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authorChristian Krinitsin <mail@krinitsin.com>2025-07-03 07:27:52 +0000
committerChristian Krinitsin <mail@krinitsin.com>2025-07-03 07:27:52 +0000
commitd0c85e36e4de67af628d54e9ab577cc3fad7796a (patch)
treef8f784b0f04343b90516a338d6df81df3a85dfa2 /results/classifier/gemma3:12b/assembly/1631625
parent7f4364274750eb8cb39a3e7493132fca1c01232e (diff)
downloadqemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.tar.gz
qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.zip
add deepseek and gemma results
Diffstat (limited to 'results/classifier/gemma3:12b/assembly/1631625')
-rw-r--r--results/classifier/gemma3:12b/assembly/163162516
1 files changed, 16 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/assembly/1631625 b/results/classifier/gemma3:12b/assembly/1631625
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+
+target-mips/dsp_helper.c: two possible bad shifts
+
+target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a subsequent expansion to the 64-bit type.
+
+Source code is
+
+        temp = temp & ((0x01 << (size + 1)) - 1);
+
+If size >= 32, then better code might be
+
+        temp = temp & ((0x01UL << (size + 1)) - 1);
+
+target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a subsequent expansion to the 64-bit type.
+
+Duplicate
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