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authorChristian Krinitsin <mail@krinitsin.com>2025-07-03 07:27:52 +0000
committerChristian Krinitsin <mail@krinitsin.com>2025-07-03 07:27:52 +0000
commitd0c85e36e4de67af628d54e9ab577cc3fad7796a (patch)
treef8f784b0f04343b90516a338d6df81df3a85dfa2 /results/classifier/gemma3:12b/assembly/1915327
parent7f4364274750eb8cb39a3e7493132fca1c01232e (diff)
downloadqemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.tar.gz
qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.zip
add deepseek and gemma results
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+
+x86_64 cmpxchg behavior in qemu tcg does not match the real CPU
+
+QEMU version:
+1214d55d1c (HEAD, origin/master, origin/HEAD) Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging
+
+Consider the following little program:
+
+$ cat 1.c
+#include <stdio.h>
+int main() {
+  int mem = 0x12345678;
+  register long rax asm("rax") = 0x1234567812345678;
+  register int edi asm("edi") = 0x77777777;
+  asm("cmpxchg %[edi],%[mem]"
+      : [ mem ] "+m"(mem), [ rax ] "+r"(rax)
+      : [ edi ] "r"(edi));
+  long rax2 = rax;
+  printf("rax2 = %lx\n", rax2);
+}
+
+According to the Intel Manual, cmpxchg should not touch the accumulator in case the values are equal, which is indeed the case on the real CPU:
+
+$ gcc 1.c
+$ ./a.out 
+rax2 = 1234567812345678
+
+However, QEMU appears to zero extend EAX to RAX:
+
+$ qemu-x86_64 ./a.out 
+rax2 = 12345678
+
+This is also the case for lock cmpxchg.
+
+Found in BPF development context: https://lore<email address hidden>
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