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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 07:27:52 +0000 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 07:27:52 +0000 |
| commit | d0c85e36e4de67af628d54e9ab577cc3fad7796a (patch) | |
| tree | f8f784b0f04343b90516a338d6df81df3a85dfa2 /results/classifier/gemma3:12b/boot/1447 | |
| parent | 7f4364274750eb8cb39a3e7493132fca1c01232e (diff) | |
| download | qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.tar.gz qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.zip | |
add deepseek and gemma results
Diffstat (limited to 'results/classifier/gemma3:12b/boot/1447')
| -rw-r--r-- | results/classifier/gemma3:12b/boot/1447 | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/boot/1447 b/results/classifier/gemma3:12b/boot/1447 new file mode 100644 index 000000000..11a1d1140 --- /dev/null +++ b/results/classifier/gemma3:12b/boot/1447 @@ -0,0 +1,8 @@ + +riscv: reset_vec uses CSR even when disabled causing inability to boot +Steps to reproduce: +1. Run any rv32 binary with `./qemu-system-riscv32 -cpu rv32,d=off,f=off,Zicsr=off` + +To view using GDB use `./qemu-system-riscv32 -cpu rv32,d=off,f=off,Zicsr=off -S -s` +`gdb-multiarch --ex="target remote localhost:1234" -ex "layout asm"` +then type `si` till $pc jumps to zero on `csrr a0, mhartid` |