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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 07:27:52 +0000 |
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| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 07:27:52 +0000 |
| commit | d0c85e36e4de67af628d54e9ab577cc3fad7796a (patch) | |
| tree | f8f784b0f04343b90516a338d6df81df3a85dfa2 /results/classifier/gemma3:12b/device/2952 | |
| parent | 7f4364274750eb8cb39a3e7493132fca1c01232e (diff) | |
| download | qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.tar.gz qemu-analysis-d0c85e36e4de67af628d54e9ab577cc3fad7796a.zip | |
add deepseek and gemma results
Diffstat (limited to 'results/classifier/gemma3:12b/device/2952')
| -rw-r--r-- | results/classifier/gemma3:12b/device/2952 | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/device/2952 b/results/classifier/gemma3:12b/device/2952 new file mode 100644 index 000000000..9937f4be0 --- /dev/null +++ b/results/classifier/gemma3:12b/device/2952 @@ -0,0 +1,15 @@ + +Truncated bits while writing value to registers of RISC-V +Description of problem: +As mentioned above +Steps to reproduce: +``` +# 1. Compile the `test.S`: +riscv32-unknown-linux-gnu-gcc -g -static -nostartfiles -o test hello.S + +# 2. Execute the binary: +qemu-riscv32 ./test + +# 3. Check exit code +echo $? +``` |