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authorChristian Krinitsin <mail@krinitsin.com>2025-07-07 17:18:14 +0000
committerChristian Krinitsin <mail@krinitsin.com>2025-07-07 17:18:14 +0000
commit61361f925d4914a6608a0076e64cc2399311ed5f (patch)
tree6f717c2ff0b11d7493e60da9757818d119cfb541 /results/classifier/phi4:14b/reasoning/instruction/2595
parent238ec2b7cc1557d6f34c33cc482e4d0cd3e266dd (diff)
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+Instruction
+
+The issue described in the bug report pertains to incorrect behavior of specific instructions (SDOT and UDOT) within the context of ARM SVE on QEMU. The report specifically addresses how these instructions operate when used with certain vector lengths, which indicates an instruction-level fault rather than a syscall or runtime error.
+
+The focus is on the assembly implementation (`sdot z0.d, z1.h, z2.h[0]`) and its alignment with expected intrinsic behaviors, highlighting it as a problem at the instruction execution level. Therefore, the most appropriate category for this bug report is "instruction."
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