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Diffstat (limited to 'gitlab/issues/target_missing/host_missing/accel_TCG/1503.toml')
| -rw-r--r-- | gitlab/issues/target_missing/host_missing/accel_TCG/1503.toml | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/gitlab/issues/target_missing/host_missing/accel_TCG/1503.toml b/gitlab/issues/target_missing/host_missing/accel_TCG/1503.toml new file mode 100644 index 000000000..389b0e4bb --- /dev/null +++ b/gitlab/issues/target_missing/host_missing/accel_TCG/1503.toml @@ -0,0 +1,58 @@ +id = 1503 +title = "Writing to readonly memory should call cpu_transaction_failed" +state = "opened" +created_at = "2023-02-23T03:30:17.223Z" +closed_at = "n/a" +labels = ["accel: TCG", "workflow::Needs Info"] +url = "https://gitlab.com/qemu-project/qemu/-/issues/1503" +host-os = "n/a" +host-arch = "n/a" +qemu-version = "n/a" +guest-os = "n/a" +guest-arch = "n/a" +description = """Currently if a guest writes to ROM memory on a system that doesn't have some other form of memory protection enabled, QEMU will silently ignore the write (https://gitlab.com/qemu-project/qemu/-/blob/master/accel/tcg/cputlb.c#L2432). Instead, it should call cpu_transaction_failed (similar to what happens when a MMIO operation fails in `io_writex` and other places). For CPUs that don't care, it'll continue to be ignored, but for other CPUs the user will get a warning (with `-d guest_errors`) or an exception as appropriate.""" +reproduce = """N/A""" +additional = """The documentation for do_transaction_failed says: + +``` +@do_transaction_failed: Callback for handling failed memory transactions +(ie bus faults or external aborts; not MMU faults) +``` + +which seems reasonably well suited for this case. Here's an overview of what different CPUs currently do if do_transaction_failed is called: + +alpha_cpu_do_transaction_failed: + +* raises a EXCP_MCHK + +arm_cpu_do_transaction_failed: + +* raises ARMFault_SyncExternal with EXCP_DATA_ABORT + +loongarch_cpu_do_transaction_failed: + +* raises EXCCODE_ADEM + +m68k_cpu_transaction_failed: + +* raises EXCP_ACCESS (M68040 only) + +mb_cpu_transaction_failed: + +* raises EXCP_HW_EXCP with ESR_EC_DATA_BUS + +mips_cpu_do_transaction_failed: + +* raises EXCP_DBE (data bus error) + +riscv_cpu_do_transaction_failed: + +* raises RISCV_EXCP_STORE_AMO_ACCESS_FAULT + +sparc_cpu_do_transaction_failed: + +* raises an MMU fault + +xtensa_cpu_do_transaction_failed + +* raises LOAD_STORE_PIF_ADDR_ERROR_CAUSE""" |