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+id = 584
+title = "qemu-system-ppc: extra IPI interrupt on core0"
+state = "closed"
+created_at = "2021-08-31T05:43:03.509Z"
+closed_at = "2021-09-30T16:38:03.120Z"
+labels = ["target: ppc"]
+url = "https://gitlab.com/qemu-project/qemu/-/issues/584"
+host-os = "Linux"
+host-arch = "x86_64"
+qemu-version = "QEMU emulator version 6.1.0"
+guest-os = "vxWroks/linux"
+guest-arch = "PowerPC"
+description = """When I try to emit an IPI interrupt from core0 to another core via the MPIC controller(IPIDR1—Interprocessor interrupt dispatch register 1), core0 itself generates an unwanted IPI interrupt."""
+reproduce = """1. Prepare ISR routine, something like:
+
+    void ipi_handler (void)
+    {
+\tint core_id = CORE_ID_GET(); 
+        myprintf("\\n IPI interrupt triggered on core:%d\\n",core_id);
+    }
+2. Create a task and bind it to core0. This task is mainly to write the MPIC controller to emit IPI interrupts to other cores.
+    MPIC_REG_WRITE(MPIC_BASE + IPIDR1, **0xe**);
+
+3. run the test task"""
+additional = """/* Below test was tested on Qemu6.1 */
+
+IPI interrupts are emitted by core:0
+
+**IPI interrupt triggered on core:0** /* it's a bug, it should not trigger on core 0. */
+
+IPI interrupt triggered on core:1
+
+IPI interrupt triggered on core:2
+
+IPI interrupt triggered on core:3
+
+
+This bug only occurs when "emitting an IPIDR1 interrupt from **core0**".
+
+------------
+
+
+/* Below test was tested on real board(fsl_p4080ds) */
+
+IPI interrupts are emitted by core:0
+
+IPI interrupt triggered on core:1
+
+IPI interrupt triggered on core:2
+
+IPI interrupt triggered on core:3"""