1 files changed, 41 insertions, 0 deletions

diff --git a/gitlab/issues/target_sparc/host_missing/accel_TCG/1771.toml b/gitlab/issues/target_sparc/host_missing/accel_TCG/1771.toml
new file mode 100644
index 000000000..897645e11
--- /dev/null
+++ b/gitlab/issues/target_sparc/host_missing/accel_TCG/1771.toml
@@ -0,0 +1,41 @@
+id = 1771
+title = "Missing CASA instruction handling for SPARC qemu-user"
+state = "opened"
+created_at = "2023-07-18T13:21:56.422Z"
+closed_at = "n/a"
+labels = ["accel: TCG", "target: sparc"]
+url = "https://gitlab.com/qemu-project/qemu/-/issues/1771"
+host-os = "Slackware GNU/Linux"
+host-arch = "x86_64"
+qemu-version = "8.0.50 (git commit hash 4633c1e2c576fbabfe5c8c93f4b842504b69c096)"
+guest-os = "GNU/Linux user-space"
+guest-arch = "qemu-sparc (LEON3 cpu)"
+description = """Qemu-sparc does not handle the CASA instruction, even if the selected CPU (in this case, LEON3) support it."""
+reproduce = """1. Launch a program that use CASA instruction (any program, also "ls" on a recent glibc [>=2.31])
+2. qemu-sparc will raise "Illegal instruction""""
+additional = """The following patch remove the missing handling, but it needs asi load/store that is not implemented for sparc32 user-space.
+
+```
+diff -urp qemu-20230327.orig/target/sparc/translate.c qemu-20230327/target/sparc/translate.c
+--- qemu-20230327.orig/target/sparc/translate.c 2023-03-27 15:41:42.000000000 +0200
++++ qemu-20230327/target/sparc/translate.c      2023-04-01 15:24:18.293176711 +0200
+@@ -5521,7 +5522,7 @@ static void disas_sparc_insn(DisasContex
+                 case 0x37: /* stdc */
+                     goto ncp_insn;
+ #endif
+-#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
++//#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
+                 case 0x3c: /* V9 or LEON3 casa */
+ #ifndef TARGET_SPARC64
+                     CHECK_IU_FEATURE(dc, CASA);
+@@ -5529,8 +5530,8 @@ static void disas_sparc_insn(DisasContex
+                     rs2 = GET_FIELD(insn, 27, 31);
+                     cpu_src2 = gen_load_gpr(dc, rs2);
+                     gen_cas_asi(dc, cpu_addr, cpu_src2, insn, rd);
++//#endif
+                     break;
+-#endif
+                 default:
+                     goto illegal_insn;
+                 }
+```"""