diff options
Diffstat (limited to 'results/classifier/108/other/1938')
| -rw-r--r-- | results/classifier/108/other/1938 | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/results/classifier/108/other/1938 b/results/classifier/108/other/1938 new file mode 100644 index 000000000..7921a7c88 --- /dev/null +++ b/results/classifier/108/other/1938 @@ -0,0 +1,51 @@ +graphic: 0.858 +device: 0.845 +debug: 0.801 +other: 0.781 +semantic: 0.724 +performance: 0.651 +socket: 0.405 +network: 0.368 +files: 0.366 +PID: 0.350 +boot: 0.321 +vnc: 0.164 +KVM: 0.074 +permissions: 0.048 + +[ARM/PL011] Wrong UART register spacing reported in DBG2/SPCR +Description of problem: +QEMU reports the UART address on aarch64 (for PL011 UART) via the ACPI DBG2 and SPCR tables using the ACPI GAS structure. According to MSFT documentation at https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table: + +> * The Register Bit Width field contains the register stride and must be a power of 2 that is at least as large as the access size. On 32-bit platforms this value cannot exceed 32. On 64-bit platforms this value cannot exceed 64. +> * The Access Size field is used to determine whether byte, WORD, DWORD, or QWORD accesses are to be used. QWORD accesses are only valid on 64-bit architectures. + +For the PL011, the MMIO registers are: +* spaced 4 bytes apart; therefore the reported bit width should be 32 instead of 8. +* 16 bits wide; therefore the access width should be 2 instead of 1. + +In other words: +``` +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 6b674231c2..cd284676d7 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -482,7 +482,7 @@ build_spcr(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + build_append_int_noprefix(table_data, 3, 1); /* ARM PL011 UART */ + build_append_int_noprefix(table_data, 0, 3); /* Reserved */ + /* Base Address */ +- build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, ++ build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 2, + vms->memmap[VIRT_UART].base); + /* Interrupt Type */ + build_append_int_noprefix(table_data, +@@ -673,7 +673,7 @@ build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + build_append_int_noprefix(table_data, 34, 2); + + /* BaseAddressRegister[] */ +- build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, ++ build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 2, + vms->memmap[VIRT_UART].base); + + /* AddressSize[] */ +``` |