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+architecture: 0.952
+risc-v: 0.916
+assembly: 0.781
+graphic: 0.759
+performance: 0.649
+device: 0.634
+semantic: 0.632
+mistranslation: 0.442
+permissions: 0.288
+vnc: 0.284
+debug: 0.274
+register: 0.245
+virtual: 0.240
+user-level: 0.209
+ppc: 0.207
+network: 0.181
+peripherals: 0.174
+arm: 0.148
+boot: 0.140
+PID: 0.138
+kernel: 0.133
+socket: 0.116
+x86: 0.109
+TCG: 0.107
+VMM: 0.089
+files: 0.081
+hypervisor: 0.070
+i386: 0.054
+KVM: 0.044
+--------------------
+risc-v: 0.998
+debug: 0.831
+virtual: 0.450
+performance: 0.070
+register: 0.067
+assembly: 0.067
+architecture: 0.021
+hypervisor: 0.020
+boot: 0.015
+semantic: 0.005
+TCG: 0.004
+PID: 0.004
+files: 0.003
+user-level: 0.003
+kernel: 0.002
+device: 0.002
+socket: 0.001
+KVM: 0.001
+network: 0.001
+graphic: 0.001
+permissions: 0.001
+VMM: 0.000
+peripherals: 0.000
+vnc: 0.000
+mistranslation: 0.000
+arm: 0.000
+x86: 0.000
+i386: 0.000
+ppc: 0.000
+
+RISC-V 64, CPUs do ilegal 0x00 write with SMP
+
+When QEMU is runt like this:
+
+qemu-system-riscv64 -d unimp,guest_errors -smp 8
+
+Other harts will do a illegal write on address 0x00.
+
+This could be mostly (i think) because the initial assembly code is only loaded on the first hart and the others do a mess because there is no code to execute.
+
+Even with -smp 1 you will see the same errors. The problem is because there is nothing to run after OpenSBI jumps to the next stage.
+
+If you load a kernel you will not see the error messages.
+