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+ppc: 0.884
+device: 0.792
+architecture: 0.634
+vnc: 0.601
+graphic: 0.525
+mistranslation: 0.519
+socket: 0.510
+network: 0.458
+register: 0.454
+semantic: 0.448
+performance: 0.440
+kernel: 0.438
+PID: 0.430
+files: 0.420
+risc-v: 0.386
+boot: 0.382
+x86: 0.373
+peripherals: 0.364
+i386: 0.346
+VMM: 0.342
+permissions: 0.326
+arm: 0.322
+TCG: 0.308
+hypervisor: 0.273
+user-level: 0.238
+virtual: 0.230
+debug: 0.192
+assembly: 0.160
+KVM: 0.125
+
+powerpc 7450 MMU initialization broken
+
+The 7540 family of PPCs' MMU can update TLBs using hardware search (like a 604 or 7400) but also using a software algorithm. The mechanism used is defined by HID0[STEN].
+
+By default (CPU reset) HID0 is set to 0x80000000 (BTW; another small bug, qemu doesn't set the hardwired MSB), hence
+the software-table lookup feature is *disabled*. However, the default (and immutable) 'mmu_model' for this CPU family is POWERC_MMU_SOFT_74XX which choses the soft TLB replacement scheme.
+
+To fix this:
+
+1) the initial mmu_model for the 7450 family (includes 7441, 7445, 7451, 7455, 7457, 7447, 7448) should be: POWERPC_MMU_32B
+2) when HID0[STEN] is written then the mmu_model should be changed accordingly (I'm not familiar enough with the qemu internal state to judge if any cached state would have to be updated).
+
+Looking through old bug tickets... is this still an issue with the latest version of QEMU? Or could we close this ticket nowadays?
+
+
+From looking at the source code of 5.1.0-rc3 (target/ppc/translate_init.inc.c) it seems that this is still an issue.
+
+
+This is an automated cleanup. This bug report has been moved to QEMU's
+new bug tracker on gitlab.com and thus gets marked as 'expired' now.
+Please continue with the discussion here:
+
+ https://gitlab.com/qemu-project/qemu/-/issues/86
+
+