summary refs log tree commit diff stats
path: root/results/classifier/118/semantic-x86/1375
diff options
context:
space:
mode:
Diffstat (limited to 'results/classifier/118/semantic-x86/1375')
-rw-r--r--results/classifier/118/semantic-x86/137579
1 files changed, 79 insertions, 0 deletions
diff --git a/results/classifier/118/semantic-x86/1375 b/results/classifier/118/semantic-x86/1375
new file mode 100644
index 000000000..3e2f80950
--- /dev/null
+++ b/results/classifier/118/semantic-x86/1375
@@ -0,0 +1,79 @@
+x86: 0.998
+semantic: 0.988
+architecture: 0.858
+graphic: 0.792
+device: 0.739
+assembly: 0.675
+i386: 0.626
+performance: 0.586
+ppc: 0.553
+vnc: 0.520
+permissions: 0.509
+debug: 0.468
+network: 0.458
+kernel: 0.414
+boot: 0.413
+socket: 0.407
+PID: 0.343
+risc-v: 0.341
+register: 0.317
+mistranslation: 0.269
+KVM: 0.247
+VMM: 0.247
+files: 0.241
+TCG: 0.235
+arm: 0.223
+peripherals: 0.200
+virtual: 0.184
+hypervisor: 0.166
+user-level: 0.104
+--------------------
+x86: 1.000
+semantic: 0.987
+assembly: 0.979
+i386: 0.927
+debug: 0.085
+user-level: 0.042
+files: 0.041
+register: 0.036
+risc-v: 0.020
+PID: 0.015
+architecture: 0.014
+performance: 0.014
+kernel: 0.014
+virtual: 0.014
+TCG: 0.012
+VMM: 0.011
+network: 0.008
+device: 0.005
+permissions: 0.004
+hypervisor: 0.004
+socket: 0.004
+peripherals: 0.003
+boot: 0.002
+vnc: 0.002
+graphic: 0.002
+KVM: 0.001
+ppc: 0.001
+mistranslation: 0.001
+arm: 0.000
+
+x86 SSE/SSE2/SSE3 instruction semantic bugs with NaN
+Description of problem:
+The result of SSE/SSE2/SSE3 instructions with NaN is different from the CPU. From Intel manual Volume 1 Appendix D.4.2.2, they defined the behavior of such instructions with NaN. But I think QEMU did not implement this semantic exactly because the byte result is different.
+Steps to reproduce:
+1. Compile this code
+```
+void main() {
+    asm("mov rax, 0x000000007fffffff; push rax; mov rax, 0x00000000ffffffff; push rax; movdqu XMM1, [rsp];");
+    asm("mov rax, 0x2e711de7aa46af1a; push rax; mov rax, 0x7fffffff7fffffff; push rax; movdqu XMM2, [rsp];");
+    asm("addsubps xmm1, xmm2");
+}
+```
+2. Execute and compare the result with the CPU. This problem happens with other SSE/SSE2/SSE3 instructions specified in the manual, Volume 1 Appendix D.4.2.2.
+    - CPU
+        - xmm1[3] = 0xffffffff
+    - QEMU
+        - xmm1[3] = 0x7fffffff
+Additional information:
+This bug is discovered by research conducted by KAIST SoftSec.