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Diffstat (limited to 'results/classifier/accel-gemma3:12b/kvm/1080086')
| -rw-r--r-- | results/classifier/accel-gemma3:12b/kvm/1080086 | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/results/classifier/accel-gemma3:12b/kvm/1080086 b/results/classifier/accel-gemma3:12b/kvm/1080086 new file mode 100644 index 000000000..6a8ab7831 --- /dev/null +++ b/results/classifier/accel-gemma3:12b/kvm/1080086 @@ -0,0 +1,25 @@ + +MC146818 RTC breaks when SET bit in Register B is on. + +This bug occurs when the SET flag of Register B is enabled. When an RTC +data register (i.e. any of the 10 bytes of time/calender data in CMOS) is set, +the data is (as expected) correctly stored in the cmos_data array. However, +since the SET flag is enabled, the function rtc_set_time is not invoked. +As a result, the field base_rtc in RTCState remains uninitialized. This appears to +cause a problem on subsequent writes which can end up overwriting data. + +To see this, consider writing data to Register A after having written +data to any of the RTC data registers; the following figure illustrates +the call stack for the Register A write operation: + + +- cmos_io_port_write + +-- check_update_timer + +---- get_next_alarm + +------ rtc_update_time + +In rtc_update_time, get_guest_rtc calculates the wrong time and +overwrites the previously written RTC data register values. + +I have created a standalone test case which exposes this bug: + + https://github.com/ahorn/benchmarks/commit/fff1ca40694bbef6f7f9de323bb0bed63419ef99 \ No newline at end of file |