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Diffstat (limited to 'results/classifier/gemma3:12b/debug/1079080')
| -rw-r--r-- | results/classifier/gemma3:12b/debug/1079080 | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/debug/1079080 b/results/classifier/gemma3:12b/debug/1079080 new file mode 100644 index 000000000..07054d7c5 --- /dev/null +++ b/results/classifier/gemma3:12b/debug/1079080 @@ -0,0 +1,12 @@ + +ARM instruction "srs" wrong behaviour + +Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : +"Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode" + +Problem: +When executing this instruction, the register stored is CPSR instead of SPSR. + +Context: +Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: +qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic \ No newline at end of file |