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Diffstat (limited to 'results/classifier/gemma3:12b/device/1923861')
| -rw-r--r-- | results/classifier/gemma3:12b/device/1923861 | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/device/1923861 b/results/classifier/gemma3:12b/device/1923861 new file mode 100644 index 000000000..7e79c8ed9 --- /dev/null +++ b/results/classifier/gemma3:12b/device/1923861 @@ -0,0 +1,22 @@ + +Hardfault when accessing FPSCR register + +QEMU release version: v6.0.0-rc2 + +command line: +qemu-system-arm -machine mps3-an547 -nographic -kernel <my_project>.elf -semihosting -semihosting-config enable=on,target=native + +host operating system: Linux ISCNR90TMR1S 5.4.72-microsoft-standard-WSL2 #1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux + +guest operating system: none (bare metal) + +Observation: +I am simulating embedded firmware for a Cortex-M55 device, using MPS3-AN547 machine. In the startup code I am accessing the FPSCR core register: + + unsigned int fpscr =__get_FPSCR(); + fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk); + __set_FPSCR(fpscr); + +where the register access functions __get_FPSCR() and __set_FPSCR(fpscr) are taken from CMSIS_5 at ./CMSIS/Core/include/cmsis_gcc.h + +I observe hardfaults upon __get_FPSCR() and __set_FPSCR(fpscr). The same startup code works fine on the Arm Corstone-300 FVP. \ No newline at end of file |