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Diffstat (limited to 'results/classifier/zero-shot/108/other/1503')
| -rw-r--r-- | results/classifier/zero-shot/108/other/1503 | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/results/classifier/zero-shot/108/other/1503 b/results/classifier/zero-shot/108/other/1503 new file mode 100644 index 000000000..50063d34d --- /dev/null +++ b/results/classifier/zero-shot/108/other/1503 @@ -0,0 +1,65 @@ +device: 0.792 +other: 0.656 +semantic: 0.535 +graphic: 0.496 +vnc: 0.492 +socket: 0.472 +files: 0.459 +PID: 0.360 +debug: 0.300 +boot: 0.282 +permissions: 0.254 +performance: 0.233 +network: 0.151 +KVM: 0.100 + +Writing to readonly memory should call cpu_transaction_failed +Description of problem: +Currently if a guest writes to ROM memory on a system that doesn't have some other form of memory protection enabled, QEMU will silently ignore the write (https://gitlab.com/qemu-project/qemu/-/blob/master/accel/tcg/cputlb.c#L2432). Instead, it should call cpu_transaction_failed (similar to what happens when a MMIO operation fails in `io_writex` and other places). For CPUs that don't care, it'll continue to be ignored, but for other CPUs the user will get a warning (with `-d guest_errors`) or an exception as appropriate. +Steps to reproduce: +N/A +Additional information: +The documentation for do_transaction_failed says: + +``` +@do_transaction_failed: Callback for handling failed memory transactions +(ie bus faults or external aborts; not MMU faults) +``` + +which seems reasonably well suited for this case. Here's an overview of what different CPUs currently do if do_transaction_failed is called: + +alpha_cpu_do_transaction_failed: + +* raises a EXCP_MCHK + +arm_cpu_do_transaction_failed: + +* raises ARMFault_SyncExternal with EXCP_DATA_ABORT + +loongarch_cpu_do_transaction_failed: + +* raises EXCCODE_ADEM + +m68k_cpu_transaction_failed: + +* raises EXCP_ACCESS (M68040 only) + +mb_cpu_transaction_failed: + +* raises EXCP_HW_EXCP with ESR_EC_DATA_BUS + +mips_cpu_do_transaction_failed: + +* raises EXCP_DBE (data bus error) + +riscv_cpu_do_transaction_failed: + +* raises RISCV_EXCP_STORE_AMO_ACCESS_FAULT + +sparc_cpu_do_transaction_failed: + +* raises an MMU fault + +xtensa_cpu_do_transaction_failed + +* raises LOAD_STORE_PIF_ADDR_ERROR_CAUSE |