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+[RV64] Problematic handling of overflow flag with ORI instruction
+Upon reviewing my code of `emit_sar32c()`, I found that flags are forgotten to be shifted, and then discovered the fact that setting OF with ORI instruction is causing headache.

+

+RISC-V spec says that:

+

+> ANDI, ORI, XORI are logical operations that perform bitwise AND, OR, and XOR on register rs1 and the sign-extended 12-bit immediate and place the result in rd.

+

+Unfortunately, the overflow flag of x86 FLAGS register is located at the 12th least significant bit. If we try to do ORI with 0x0800, the immediate operand is actually 0xFFFFFFFFFFFFF800 (sign extend 0x0800 to 64 bits), thus destroying flags in higher bits.

+

+I've discussed some ideas with @ksco:

+

+1. `CLEAR_FLAGS` still works, and all flags are cleared.

+2. 3 reserved flags exists in lower flag bits, so we may hack one of these.

+3. flags higher than OF are not so useful, is there any chance that we can safely ignore them?
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