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id = 2861
title = "hw/pci-host/designware.c incorrect write to DESIGNWARE_PCIE_ATU_UPPER_TARGET register"
state = "closed"
created_at = "2025-03-13T13:41:16.866Z"
closed_at = "2025-04-02T00:15:39.783Z"
labels = ["kind::Bug", "target: arm", "workflow::Patch available"]
url = "https://gitlab.com/qemu-project/qemu/-/issues/2861"
host-os = "n/a"
host-arch = "n/a"
qemu-version = "n/a"
guest-os = "n/a"
guest-arch = "n/a"
description = """I think this is a obvious bug
https://gitlab.com/qemu-project/qemu/-/blob/master/hw/pci-host/designware.c?ref_type=heads#L374
Write to register DESIGNWARE_PCIE_ATU_UPPER_TARGET, val should be shifted left to update upper 32 bit part."""
reproduce = "n/a"
additional = "n/a"
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