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SH4: ADDV instruction not emulated properly
Description of problem:
ADDV opcode is emulated incorrectly.
The documentation says:
`ADDV Rm, Rn Rn + Rm -> Rn, overflow -> T`
What Qemu actually emulates:
`ADDV Rm, Rn Rn + Rm -> Rm, overflow -> T`
Steps to reproduce:
```c
#include <stdio.h>
int main(void)
{
register unsigned int a asm("r8") = 0x7fffffff;
register unsigned int b asm("r9") = 1;
register unsigned int c asm("r10");
asm volatile("clrt\n"
"addv %2,%0\n"
"movt %1\n"
: "+r"(a), "=r"(c) : "r"(b) :);
printf("Values: a=0x%x b=0x%x c=0x%x\n", a, b, c);
return 0;
}
```
Additional information:
Tested on real hardware (SEGA Dreamcast, GCC 15.0), the program above prints:
`Values: a=0x80000000 b=0x1 c=0x1`
Running with Qemu (and GCC 13.0), the same program prints:
`Values: a=0x7fffffff b=0x80000000 c=0x1`
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