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instruction: 0.977
graphic: 0.917
device: 0.843
socket: 0.778
semantic: 0.749
vnc: 0.729
network: 0.581
boot: 0.572
other: 0.534
mistranslation: 0.523
assembly: 0.491
KVM: 0.118
Missing CASA instruction handling for SPARC qemu-user
Description of problem:
Qemu-sparc does not handle the CASA instruction, even if the selected CPU (in this case, LEON3) support it.
Steps to reproduce:
1. Launch a program that use CASA instruction (any program, also "ls" on a recent glibc [>=2.31])
2. qemu-sparc will raise "Illegal instruction"
Additional information:
The following patch remove the missing handling, but it needs asi load/store that is not implemented for sparc32 user-space.
```
diff -urp qemu-20230327.orig/target/sparc/translate.c qemu-20230327/target/sparc/translate.c
--- qemu-20230327.orig/target/sparc/translate.c 2023-03-27 15:41:42.000000000 +0200
+++ qemu-20230327/target/sparc/translate.c 2023-04-01 15:24:18.293176711 +0200
@@ -5521,7 +5522,7 @@ static void disas_sparc_insn(DisasContex
case 0x37: /* stdc */
goto ncp_insn;
#endif
-#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
+//#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
case 0x3c: /* V9 or LEON3 casa */
#ifndef TARGET_SPARC64
CHECK_IU_FEATURE(dc, CASA);
@@ -5529,8 +5530,8 @@ static void disas_sparc_insn(DisasContex
rs2 = GET_FIELD(insn, 27, 31);
cpu_src2 = gen_load_gpr(dc, rs2);
gen_cas_asi(dc, cpu_addr, cpu_src2, insn, rd);
+//#endif
break;
-#endif
default:
goto illegal_insn;
}
```
|