blob: 6118b9bfedd640fd8c3803d17a59b36e70090e3a (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
graphic: 0.800
assembly: 0.749
device: 0.731
performance: 0.699
mistranslation: 0.533
kernel: 0.477
ppc: 0.446
socket: 0.270
x86: 0.259
boot: 0.257
architecture: 0.254
semantic: 0.231
i386: 0.231
debug: 0.213
arm: 0.209
risc-v: 0.203
virtual: 0.186
register: 0.169
vnc: 0.131
network: 0.118
hypervisor: 0.113
peripherals: 0.077
PID: 0.073
user-level: 0.073
permissions: 0.066
VMM: 0.033
KVM: 0.030
TCG: 0.024
files: 0.016
MIPS, self-modifying code and uncached memory
Self-modifying code does not work properly in MIPS in uncached and unmapped kseg1 memory region.
For example, when running this code I get unexpected behavior:
0: e3000010 b 0x390
4: 00000000 nop
...
380: 00701f40 mfc0 ra,c0_epc
384: 0400e0bb swr zero,4(ra)
388: 18000042 eret
38c: 00000000 nop
390: 25500000 move t2,zero
394: 02000b34 li t3,0x2
398: 23504b01 subu t2,t2,t3
39c: e9003c0b j 0xcf003a4
3a0: 0a004a21 addi t2,t2,10
3a4: ffff0010 b 0x3a4
3a8: 00000000 nop
3ac: 00000000 nop
I expect that swr instruction in line 384 would change `addi t2,t2,1`0 to `nop`
This should work because no cache is used for this memory region.
Can you please provide full reproduction steps rather than just an assembly snippet?
[Expired for QEMU because there has been no activity for 60 days.]
|