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device: 0.438
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architecture: 0.283
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KVM: 0.055

'mtfsf' instruction can clear FI incorrectly

Using mtfsf instruction can clear the FPSCR FI bit incorrectly.  This code snippet exhibits the issue:
--
  fpscr.ll = 0x1fffffff;
  __builtin_mtfsf (0b11111111, fpscr.d);
  fpscr.d = __builtin_mffs ();
--

On POWER9 hardware:
mffs    : FPSCR = 0x000000007ffff7ff

On qemu (git master; "-cpu POWER9"):
--
$ ./mtfsf
mffs    : FPSCR = 0x000000007ffdffff
--

Two differences:
bit 52: "reserved", so maybe a "don't care" case
bit 46: "FI"

$ git log -1 master
commit 89ea03a7dc83ca36b670ba7f787802791fcb04b1
Merge: 019217c 2531164
Author: Peter Maydell <email address hidden>
Date:   Mon Sep 9 09:48:34 2019 +0100

I tracked the clear is coming from do_float_check_status, likely the one in gen_mtfsf, but then I get lost figuring out what _should_ be happening. :-/

Test attached.



The QEMU project is currently considering to move its bug tracking to
another system. For this we need to know which bugs are still valid
and which could be closed already. Thus we are setting older bugs to
"Incomplete" now.

If you still think this bug report here is valid, then please switch
the state back to "New" within the next 60 days, otherwise this report
will be marked as "Expired". Or please mark it as "Fix Released" if
the problem has been solved with a newer version of QEMU already.

Thank you and sorry for the inconvenience.



This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:

 https://gitlab.com/qemu-project/qemu/-/issues/266