blob: 7e7515883efe66f954b8b0fff883409f62b26827 (
plain) (
blame)
1
2
3
4
5
6
7
8
|
[RV64_DYNAREC] How to View Register Values at Runtime and Set Breakpoints in RISC-V Target Code?
I'm currently trying to modify the translation logic of some RISC-V instructions, but I encounter errors in the computation results when running test programs. To diagnose the issue, I’d like to observe the state of RISC-V registers at a specific point during execution. I have the following questions:
1. How can I view the RISC-V register values of the translated target code at a specific moment during runtime?
2. Is it possible to set breakpoints in the RISC-V target code, so I can pause execution midway and facilitate debugging?
I'm looking for straightforward methods (e.g., using debugging tools) to accomplish this or any recommended techniques to check the real-time state of registers.
|