blob: c36d46fe51be7700268d13f3104ff7d44965a881 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
|
ARM instruction "srs" wrong behaviour
Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R :
"Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode"
Problem:
When executing this instruction, the register stored is CPSR instead of SPSR.
Context:
Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line:
qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic
|