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ARM instruction "srs" wrong behaviour
Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R :
"Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode"
Problem:
When executing this instruction, the register stored is CPSR instead of SPSR.
Context:
Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line:
qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic
It looks like this is only a problem in Thumb mode; the equivalent bug in ARM mode was fixed in commit c67b6b71 back in 2009.
Can you make the test case dtb and image available? That would help in testing...
Thanks -- I've submitted a patch which fixes this: http://patchwork.ozlabs.org/patch/220748/
If you'd like to give me a name/email [format "Full Name <email address hidden>"] I can credit you in a Reported-by: tag in the commit message...
You are welcome.
Credit info you need: Cesson Vincent <email address hidden>
Thank you for fixing it!
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