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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-03-12 16:04:15 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-03-12 16:04:15 +0100 |
| commit | 5a52922cd2b9033f6f38ea1cbc78058cf6780cf5 (patch) | |
| tree | e8e289284871fc0dfbe142e8b3fbd558fa0d8bc5 /src/tools/box64stack.c | |
| parent | 55edf30ecf0bfa127554b14a0c8149d0b1f70ded (diff) | |
| download | box64-5a52922cd2b9033f6f38ea1cbc78058cf6780cf5.tar.gz box64-5a52922cd2b9033f6f38ea1cbc78058cf6780cf5.zip | |
Added support for SSE4.1, and added a couple of opcode ([ARM64_DYNAREC] too)
Diffstat (limited to 'src/tools/box64stack.c')
| -rwxr-xr-x | src/tools/box64stack.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/tools/box64stack.c b/src/tools/box64stack.c index 42412e29..97623261 100755 --- a/src/tools/box64stack.c +++ b/src/tools/box64stack.c @@ -160,7 +160,7 @@ void SetupInitialStack(x64emu_t *emu) Push(emu, real_getauxval(14)); Push(emu, 14); //AT_EGID(14) Push(emu, p_x86_64); Push(emu, 15); //AT_PLATFORM(15)=&"x86_64" // Push HWCAP: same as CPUID 1.EDX - Push(emu, 1 // fpu + Push(emu, 1<<0 // fpu | 1<<4 // rdtsc | 1<<8 // cmpxchg8 | 1<<11 // sep (sysenter & sysexit) @@ -170,6 +170,8 @@ void SetupInitialStack(x64emu_t *emu) | 1<<24 // fxsr (fxsave, fxrestore) | 1<<25 // SSE | 1<<26 // SSE2 + | 1<<28 // hyper threading + | 1<<30 // ia64 ); Push(emu, 16); //AT_HWCAP(16)=... //Push(emu, sysconf(_SC_CLK_TCK)); Push(emu, 17); //AT_CLKTCK(17)=times() frequency |