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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-03-12 16:04:15 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-03-12 16:04:15 +0100 |
| commit | 5a52922cd2b9033f6f38ea1cbc78058cf6780cf5 (patch) | |
| tree | e8e289284871fc0dfbe142e8b3fbd558fa0d8bc5 /src/wrapped | |
| parent | 55edf30ecf0bfa127554b14a0c8149d0b1f70ded (diff) | |
| download | box64-5a52922cd2b9033f6f38ea1cbc78058cf6780cf5.tar.gz box64-5a52922cd2b9033f6f38ea1cbc78058cf6780cf5.zip | |
Added support for SSE4.1, and added a couple of opcode ([ARM64_DYNAREC] too)
Diffstat (limited to 'src/wrapped')
| -rwxr-xr-x | src/wrapped/wrappedlibc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/wrapped/wrappedlibc.c b/src/wrapped/wrappedlibc.c index ca4db823..770fdbf8 100755 --- a/src/wrapped/wrappedlibc.c +++ b/src/wrapped/wrappedlibc.c @@ -1548,7 +1548,7 @@ void CreateCPUInfoFile(int fd) P; sprintf(buff, "bogomips\t: %g\n", bogoMips); P; - sprintf(buff, "flags\t\t: fpu cx8 sep cmov clflush mmx sse sse2 syscall tsc lahf_lm ssse3 ht tm lm fma fxsr cpuid pclmulqdq cx16 aes movbe pni\n"); + sprintf(buff, "flags\t\t: fpu cx8 sep cmov clflush mmx sse sse2 syscall tsc lahf_lm ssse3 ht tm lm fma fxsr cpuid pclmulqdq cx16 aes movbe pni sse4_1\n"); P; sprintf(buff, "address sizes\t: 46 bits physical, 48 bits virtual\n"); P; |