about summary refs log tree commit diff stats
path: root/src
diff options
context:
space:
mode:
authorptitSeb <sebastien.chev@gmail.com>2023-11-20 12:31:22 +0100
committerptitSeb <sebastien.chev@gmail.com>2023-11-20 12:31:22 +0100
commit39568bff2fe3dc8d907d0738ccca4c14501cd808 (patch)
treed643a0f6c9d67549ba9fc1acbdc4906549fad91b /src
parentd3b44f1c84c42c52b401b357a3765f8e9ffdca17 (diff)
downloadbox64-39568bff2fe3dc8d907d0738ccca4c14501cd808.tar.gz
box64-39568bff2fe3dc8d907d0738ccca4c14501cd808.zip
[ARM64_DYNAREC] Added D7 XLAT opcode
Diffstat (limited to 'src')
-rw-r--r--src/dynarec/arm64/arm64_emitter.h1
-rw-r--r--src/dynarec/arm64/dynarec_arm64_00.c10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h
index 79e24f02..23842f28 100644
--- a/src/dynarec/arm64/arm64_emitter.h
+++ b/src/dynarec/arm64/arm64_emitter.h
@@ -240,6 +240,7 @@
 #define LDRxw_REG(Rt, Rn, Rm)           EMIT(LDR_REG_gen(0b10+rex.w, Rm, 0b011, 0, Rn, Rt))
 #define LDRz_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(rex.is32bits?0b10:0b11, Rm, 0b011, 0, Rn, Rt))
 #define LDRB_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b00, Rm, 0b011, 0, Rn, Rt))
+#define LDRB_REG_UXTW(Rt, Rn, Rm)       EMIT(LDR_REG_gen(0b00, Rm, 0b010, 0, Rn, Rt))
 #define LDRH_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b01, Rm, 0b011, 0, Rn, Rt))
 
 #define LDRS_U12_gen(size, op1, opc, imm12, Rn, Rt)    ((size)<<30 | 0b111<<27 | (op1)<<24 | (opc)<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index 43d0cd52..622269b9 100644
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -2547,6 +2547,16 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xD7:
+            INST_NAME("XLAT");
+            UXTBw(x1, xRAX);
+            if(rex.w || rex.is32bits) {
+                LDRB_REG(x1, xRBX, x1);
+            } else {
+                LDRB_REG_UXTW(x1, x1, xRBX);
+            }
+            BFIx(xRAX, x1, 0, 8);
+            break;
         case 0xD8:
             addr = dynarec64_D8(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
             break;