diff options
| author | Yang Liu <liuyang22@iscas.ac.cn> | 2025-04-21 19:18:40 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-21 13:18:40 +0200 |
| commit | a19f4b9eca3c38fc23020a4d841783354d6b6bc0 (patch) | |
| tree | 816efc2af402e75f8e6f6c5e6ac53b5aedaecda3 /src | |
| parent | 6f3f3e0e85bd55bae2ff2040e8e4eb921f8716dd (diff) | |
| download | box64-a19f4b9eca3c38fc23020a4d841783354d6b6bc0.tar.gz box64-a19f4b9eca3c38fc23020a4d841783354d6b6bc0.zip | |
[RV64_DYNAREC][TRACE][COSIM] Improve x87 fiability in dynarec trace and cosim scenario (#2555)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_helper.c b/src/dynarec/rv64/dynarec_rv64_helper.c index 1b0d1553..944bda40 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.c +++ b/src/dynarec/rv64/dynarec_rv64_helper.c @@ -1243,7 +1243,7 @@ static void x87_reflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int SLLI(s1, s3, 3); ADD(s1, xEmu, s1); } - if (extcache_get_st_f(dyn, ninst, dyn->e.x87cache[i]) >= 0) { + if (extcache_get_current_st_f(dyn, dyn->e.x87cache[i]) >= 0) { FCVTDS(SCRATCH0, dyn->e.x87reg[i]); FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); } else |