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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-04-01 16:11:53 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-04-01 16:12:02 +0200 |
| commit | d35217d39d66db328dae513ca7257d47b5d2c32d (patch) | |
| tree | 9723fc813fb66716007239fbcd39e9c0d9a1821f /src | |
| parent | 883463f2d5ba364b930b03a43a24da390e984c66 (diff) | |
| download | box64-d35217d39d66db328dae513ca7257d47b5d2c32d.tar.gz box64-d35217d39d66db328dae513ca7257d47b5d2c32d.zip | |
[DYNAREC] Small Fix for 67 8D opcode
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_helper.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/dynarec/dynarec_arm64_helper.c b/src/dynarec/dynarec_arm64_helper.c index 7b0cdc90..20512247 100755 --- a/src/dynarec/dynarec_arm64_helper.c +++ b/src/dynarec/dynarec_arm64_helper.c @@ -182,6 +182,9 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, ADDw_REG(ret, ret, xRIP); } else { ret = xRAX+(nextop&7)+(rex.b<<3); + if(ret==hint) { + MOVw_REG(hint, ret); //to clear upper part + } } } else { int64_t i64; @@ -203,8 +206,9 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, } else { ret = xRAX+(sib&0x07)+(rex.b<<3); } - } else + } else { ret = xRAX+(nextop&0x07)+(rex.b<<3); + } } else { int64_t sub = (i64<0)?1:0; if(sub) i64 = -i64; |