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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-06-12 22:31:48 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-06-12 22:31:56 +0200 |
| commit | e07be9564611d8150558c7a263ae332ed4341c84 (patch) | |
| tree | 8ef94382f1df9b135fed042044d30deea47a6be8 /src | |
| parent | 0777a568d7591501eea0371cc7062a93ffcf9b1a (diff) | |
| download | box64-e07be9564611d8150558c7a263ae332ed4341c84.tar.gz box64-e07be9564611d8150558c7a263ae332ed4341c84.zip | |
[DYNAREC] Fixed CC flag for SAR
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_emit_shift.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/dynarec/dynarec_arm64_emit_shift.c b/src/dynarec/dynarec_arm64_emit_shift.c index d252997f..aaf049bb 100755 --- a/src/dynarec/dynarec_arm64_emit_shift.c +++ b/src/dynarec/dynarec_arm64_emit_shift.c @@ -257,6 +257,10 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in } return; } + IFX(X_CF) { + ASRxw(s3, s1, c-1); + BFIw(xFlags, s3, 0, 1); + } ASRxw(s1, s1, c); IFX(X_PEND) { STRxw_U12(s1, xEmu, offsetof(x64emu_t, res)); @@ -267,10 +271,6 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in Bcond(cNE, +8); ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40 } - IFX(X_CF) { - ASRxw(s3, s1, c-1); - BFIw(xFlags, s3, 0, 1); - } IFX(X_SF) { LSRxw(s4, s1, (rex.w)?63:31); BFIx(xFlags, s4, F_SF, 1); |