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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-11-20 04:22:55 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-19 21:22:55 +0100 |
| commit | fa432bb9d1b4b1069aff1d08681a54e15520f6be (patch) | |
| tree | 376417b32126731dd4d25a0329a5f03cc3df638a /src | |
| parent | 81e4e26dc51b85720fbc3ba2ffe68030e5d227fa (diff) | |
| download | box64-fa432bb9d1b4b1069aff1d08681a54e15520f6be.tar.gz box64-fa432bb9d1b4b1069aff1d08681a54e15520f6be.zip | |
[ARM64_DYNAREC] Added weakbarrier=2 to disable last write barriers (#2049)
Diffstat (limited to 'src')
| -rw-r--r-- | src/core.c | 2 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 30 | ||||
| -rw-r--r-- | src/tools/rcfile.c | 2 |
3 files changed, 17 insertions, 17 deletions
diff --git a/src/core.c b/src/core.c index 07579917..346d386f 100644 --- a/src/core.c +++ b/src/core.c @@ -789,7 +789,7 @@ void LoadLogEnv() p = getenv("BOX64_DYNAREC_WEAKBARRIER"); if (p) { if (strlen(p) == 1) { - if (p[0] >= '0' && p[0] <= '1') + if (p[0] >= '0' && p[0] <= '2') box64_dynarec_weakbarrier = p[0] - '0'; } if (box64_dynarec_weakbarrier) diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 15a2d423..aa06379f 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -161,21 +161,21 @@ } while (0) // An opcode will write memory, this will be put before the STORE instruction automatically. -#define WILLWRITE() \ - do { \ - if (box64_dynarec_strongmem >= dyn->insts[ninst].will_write && dyn->smwrite == 0) { \ - /* Will write but never written, this is the start of a SEQ, put a barrier. */ \ - if (box64_dynarec_weakbarrier) \ - DMB_ISHST(); \ - else \ - DMB_ISH(); \ - } else if (box64_dynarec_strongmem >= STRONGMEM_LAST_WRITE && dyn->insts[ninst].last_write) { \ - /* Last write, put a barrier */ \ - if (box64_dynarec_weakbarrier) \ - DMB_ISHST(); \ - else \ - DMB_ISH(); \ - } \ +#define WILLWRITE() \ + do { \ + if (box64_dynarec_strongmem >= dyn->insts[ninst].will_write && dyn->smwrite == 0) { \ + /* Will write but never written, this is the start of a SEQ, put a barrier. */ \ + if (box64_dynarec_weakbarrier) \ + DMB_ISHST(); \ + else \ + DMB_ISH(); \ + } else if (box64_dynarec_strongmem >= STRONGMEM_LAST_WRITE && box64_dynarec_weakbarrier <= 1 && dyn->insts[ninst].last_write) { \ + /* Last write, put a barrier */ \ + if (box64_dynarec_weakbarrier) \ + DMB_ISHST(); \ + else \ + DMB_ISH(); \ + } \ } while (0) // Similar to WILLWRITE, but checks lock. diff --git a/src/tools/rcfile.c b/src/tools/rcfile.c index 26366ac9..5a022d7d 100644 --- a/src/tools/rcfile.c +++ b/src/tools/rcfile.c @@ -156,7 +156,7 @@ ENTRYINT(BOX64_DYNAREC_LOG, box64_dynarec_log, 0, 3, 2) \ ENTRYINT(BOX64_DYNAREC_BIGBLOCK, box64_dynarec_bigblock, 0, 3, 2) \ ENTRYSTRING_(BOX64_DYNAREC_FORWARD, box64_dynarec_forward) \ ENTRYINT(BOX64_DYNAREC_STRONGMEM, box64_dynarec_strongmem, 0, 4, 3) \ -ENTRYBOOL(BOX64_DYNAREC_WEAKBARRIER, box64_dynarec_weakbarrier) \ +ENTRYINT(BOX64_DYNAREC_WEAKBARRIER, box64_dynarec_weakbarrier, 0, 2, 2) \ ENTRYBOOL(BOX64_DYNAREC_X87DOUBLE, box64_dynarec_x87double) \ ENTRYBOOL(BOX64_DYNAREC_DIV0, box64_dynarec_div0) \ ENTRYBOOL(BOX64_DYNAREC_FASTNAN, box64_dynarec_fastnan) \ |