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* [COSIM] Disable tests fo CD opcodeptitSeb2025-10-161-1/+1
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* [ARM64_DYNAREC] Better handling for invalid opcodesptitSeb2025-10-147-881/+842
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* Added preliminary unit test runner (#3045)Yang Liu2025-10-141-7/+14
| | | | | | | | | | | | | | | | | * Added preliminary unit test runner * Set .text section address * Added support for added custom memory regions * Move json.h to include * Display banner * Added support for custom memory data * Added the ability to include path in nasm * Print env variables
* [ARM64_DYNAREC] Fixed a typo in iret_to_epilog (#3059)Yang Liu2025-10-121-1/+1
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* [DYNAREC] Fixed some oversized memory load (#3051)Yang Liu2025-10-104-9/+27
| | | | | * [DYNAREC] Fixed some oversized memory load * review
* [ARM64_DYNAREC] Changed BSF/BSR to not changed Ed if Gd==0 (seems current ↵ptitSeb2025-10-101-4/+0
| | | | cpu does this)
* [DYNAREC] Fixed 66 8D opcode and also a regression introduced in last commit ↵Yang Liu2025-10-102-8/+6
| | | | (#3050)
* [DYNAREC][INTERP] Fixed an edge case of CMPXHG (#3049)Yang Liu2025-10-102-15/+23
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* [ARM64_DYNAREC] Don't assume x1 is xRIP in link_next (fix regression ↵ptitSeb2025-10-101-0/+1
| | | | introduced with 685afa230291d64f350afbfdfa8fc82536d99f82)
* [DYNAREC] Fixed a special case of SHLD/SHRD opcodes (#3047)Yang Liu2025-10-102-3/+8
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* [DYNAREC][INTERP] Added a few multibyte nops (#3046)Yang Liu2025-10-102-0/+10
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* [ARM64_DYNAREC] Use UDF for UD2 & unsupported WBINVDptitSeb2025-10-071-6/+2
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* [ARM64_DYNAREC] Small improvment on some invalid opcode handlingptitSeb2025-10-012-2/+38
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* [TRACE] Added tooling to check if x86/x64 opcode is validptitSeb2025-10-011-1/+8
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* [ARM64_DYNAREC] Improved IRET handling of boggus parametersptitSeb2025-09-293-18/+37
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* [ARM64_DYNAREC] Added more variant of INS/OUT opcodesptitSeb2025-09-242-1/+77
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* [ARM64_DYNAREC] Fixed flags for 8bits imulptitSeb2025-09-241-2/+3
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* [ARM64_DYNAREC] Temporarily disable Atomic path for F0 0F B1, as it avoid ↵ptitSeb2025-09-171-2/+5
| | | | some games random freeze (like HorizonZeroDawn or Cyberpunk2077)
* [ARM64_DYNAREC] Fixed non-Atomic path for F0 0F C0 opcodeptitSeb2025-09-171-4/+4
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* [DYNAREC] Improved Memory Barrier handling for LOCK prefixed opcodesptitSeb2025-09-164-81/+0
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* [ARM64_DYNAREC] Allow use of Native flags when using UFLAG_IF macro helperptitSeb2025-09-152-0/+6
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* [DYNAREC] Small refactor on StrongMem emulator and lock prefixptitSeb2025-09-133-5/+3
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* [ARM64_DYNAREC] A few minor fixes to some opcodesptitSeb2025-09-085-31/+26
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* [ARM64_DYNAREC] Added some more UD handling in 64bits dynarecptitSeb2025-09-041-17/+167
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* [ARM64_DYNAREC][TRACE] Fixed SWP B/H opcodes printerptitSeb2025-08-311-2/+2
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* [ARM64_DYNAREC] Introduced a dynarec version of the UpdateFlags helper functionptitSeb2025-08-3012-25/+1180
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* [ARM64_DYNAREC] Fixed an inst name typo (#2964)Yang Liu2025-08-221-1/+5
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* [DYNAREC] Rearranged arch-specific AVX infra code (#2930)Yang Liu2025-08-133-2/+125
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* [ARM64_DYNAREC] Fixed AVX VMOVMSKPD opcode (#2909)Yang Liu2025-08-061-2/+2
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* [ARM64_DYNAREC] Fixed AVX VMOVSS opcode (#2908)Yang Liu2025-08-061-1/+1
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* [ARM64_DYNAREC][INTERP] Fixed AVX VPERM2F128/VPERM2I128 opcodes (#2907)Yang Liu2025-08-061-4/+4
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* [ARM64_DYNAREC] Fixed PCMPESTRI fastpath SF flag computation (#2876)Yang Liu2025-08-011-5/+5
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* [ARM64_DYNAREC] Fixed a typo (#2875)Yang Liu2025-08-011-1/+1
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* [ARM64_DYNAREC] Fixed some edge cases for mmx PSRLQ (#2874)Yang Liu2025-08-011-1/+3
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* [INTERP] Try to improve aligned LOCK CMPXCHG8B opcodeptitSeb2025-08-012-1/+30
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* [ARM+4_DYNAREC] Another fix for STMXCSR opcode when using SSE_FLUSHTO0ptitSeb2025-07-291-1/+1
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* [ARM+4_DYNAREC] Fixed (V)[LD/ST]MXCSR opcodes when using SSE_FLUSHTO0ptitSeb2025-07-292-35/+35
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* Some handling of case where signal numbers differs between native and x64 ↵ptitSeb2025-07-232-3/+3
| | | | archs (not complete, missing sigset conversions)
* [DYNAREC] Consolidate access to native register in signal and register ↵ptitSeb2025-07-212-142/+149
| | | | mapping acrross all 3 supported dynarec archs
* [ARM64_DYNAREC] Added 64/65 F3 0F 7F opcodeptitSeb2025-07-161-0/+21
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* [ARM64_DYNAREC] Small optim on (V/F)COMI(SS/SD) opcodesptitSeb2025-07-169-28/+48
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* [ARM64_DYNAREC] Fixed a residual issue with xmm unneeded handling when ↵ptitSeb2025-07-151-1/+1
| | | | unloading xmm9-xmm15 registers
* [LA64_DYNAREC] Fix la64 VMASKMOVPS,VMOVHPD. (#2811)phorcys2025-07-141-2/+2
| | | | * fix la64 VMASKMOVPS,VMOVHPD. * fix arm64 VMASKMOVPS,VMASKMOVPD op memo operand order.
* [ARM64_DYNAREC] Added 0F 00 /0 opcodeptitSeb2025-07-121-1/+21
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* [ARM64_DYNAREC] Simplified defered flags handling and limited case where ↵ptitSeb2025-07-104-33/+13
| | | | UpdateFlags is actualy called (could be simplified more) (TODO on RV64 and LA64)
* [RCFILE] Fixed profile per lib/dll that was using default instead of curent ↵ptitSeb2025-07-091-0/+2
| | | | env for non defined values
* [ARM64_DYNAREC] Removed fastpath for (V)MINPD/MAXPD as it's too inexactptitSeb2025-07-092-32/+14
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* [ARM64_DYNAREC] Fined tuned UD value for BSR/BSFptitSeb2025-07-092-4/+6
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* [ARM64_DYNAREC] Fixed rare sideeffect of 32bits cmpxchg opcodeptitSeb2025-07-092-2/+4
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* [ARM64_DYNAREC] Better handling of shift 0 for rcl/rct 16bitsptitSeb2025-07-091-0/+2
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