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* [RV64_DYNAREC] Added DB /2 FIST opcode (#3082)Yang Liu2025-10-212-2/+18
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* [COSIM] Disable tests fo CD opcodeptitSeb2025-10-161-0/+1
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* Added preliminary unit test runner (#3045)Yang Liu2025-10-141-0/+22
| | | | | | | | | | | | | | | | | * Added preliminary unit test runner * Set .text section address * Added support for added custom memory regions * Move json.h to include * Display banner * Added support for custom memory data * Added the ability to include path in nasm * Print env variables
* [RV64_DYNAREC] Fixed some 16bit BT/BTS/BTR/BTC opcodes (#3062)Yang Liu2025-10-121-47/+135
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* [DYNAREC] Fixed negative issues with 0F/F0 A3/AB/B3/BB opcodes (#3057)Yang Liu2025-10-112-6/+24
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* [RV64_DYNAREC] Fixed some missing sse_forget_reg for implicit xmm0 (#3056)Yang Liu2025-10-111-0/+4
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* [RV64_DYNAREC] Fixed a typo in 16bit ROR/ROL opcodes (#3053)Yang Liu2025-10-111-5/+4
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* [DYNAREC] Fixed some oversized memory load (#3051)Yang Liu2025-10-101-1/+9
| | | | | * [DYNAREC] Fixed some oversized memory load * review
* [DYNAREC] Fixed 66 8D opcode and also a regression introduced in last commit ↵Yang Liu2025-10-101-1/+1
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* [DYNAREC][INTERP] Fixed an edge case of CMPXHG (#3049)Yang Liu2025-10-101-5/+10
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* [DYNAREC] Fixed a special case of SHLD/SHRD opcodes (#3047)Yang Liu2025-10-102-3/+8
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* [DYNAREC][INTERP] Added a few multibyte nops (#3046)Yang Liu2025-10-103-0/+15
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* [DYNAREC] Optimized scalar AES impl in DynaRec (#3041)xctan2025-10-051-0/+1
| | | | | | | | | | | | | * [DYNAREC] Optimized scalar AES impl * [RV64_DYNAREC] Optimized AES with RVV * [CI] Bump RISC-V toolchains * [RV64_DYNAREC] Switch to scalar impl when xtheadvector is present * [RV64_DYNAREC] Try to disable rvv aes kernels * [RV64_DYNAREC] Reverted assembly aes functions
* [RV64_DYNAREC] Added more scalar avx opcodes (#3037)Yang Liu2025-09-293-3/+419
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* [RV64_DYNAREC] Fixed a scratch register confliction (#3033)Yang Liu2025-09-271-1/+1
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* RV64_DYNAREC] Added more avx scalar opcodes (#3029)Yang Liu2025-09-223-2/+58
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* [RV64_DYNAREC] Added more avx scalar opcodes (#3028)Yang Liu2025-09-221-0/+93
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* [DYNAREC] Improved Memory Barrier handling for LOCK prefixed opcodesptitSeb2025-09-164-53/+0
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* [DYNAREC] Small refactor on StrongMem emulator and lock prefixptitSeb2025-09-132-2/+1
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* [RV64_DYNAREC] Added more scalar avx cmp opcodes (#3016)Yang Liu2025-09-112-0/+160
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* [RV64_DYNAREC] Added more scalar avx opcodes (#3010)Yang Liu2025-09-092-0/+227
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* [RV64_DYNAREC] Added more scalar avx opcodes and fixed a typo (#3009)Yang Liu2025-09-082-1/+40
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* [RV64_DYNAREC] Added more scalar avx opcodes (#3005)Yang Liu2025-09-041-0/+129
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* [RV64_DYNAREC] Added 1 more scalar avx 0F opcode (#2994)Yang Liu2025-09-011-0/+47
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* [RV64_DYNAREC] Added more scalar avx 0F opcodes (#2992)Yang Liu2025-09-012-4/+198
| | | | | * [RV64_DYNAREC] Added more scalar avx 0F opcodes * review
* [INTERP][DYNAREC] Aligned !fastnan handling of 0F 51/52 opcodes (#2989)Yang Liu2025-09-012-14/+41
| | | | | | | | | * [INTERP] Added !fastnan handling to some 0F opcodes * [RV64_DYNAREC] Fixed/refined !fastnan handling of some 0F opcodes * la64 * more fixes
* [RV64_DYNAREC] Added more scalar avx opcodes (#2980)Yang Liu2025-08-301-0/+270
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2978)Yang Liu2025-08-291-0/+178
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2975)Yang Liu2025-08-274-67/+176
| | | | | * [RV64_DYNAREC] Added more scalar avx opcodes * fix
* [RV64_DYNAREC] Added more scalar avx opcodes (#2974)Yang Liu2025-08-261-0/+601
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2973)Yang Liu2025-08-261-0/+97
| | | | | * [RV64_DYNAREC] Added more scalar avx opcodes * fix
* [RV64_DYNAREC] Added more scalar avx opcodes (#2971)Yang Liu2025-08-253-4/+571
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2970)Yang Liu2025-08-251-0/+171
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* [RV64_DYNAREC] Added YMM0 placeholder for later optim (#2968)Yang Liu2025-08-247-241/+125
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* [RV64_DYNAREC] Fixed scalar avx VCMPPD non-ymm case (#2966)Yang Liu2025-08-221-0/+4
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2965)Yang Liu2025-08-222-0/+516
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* [RV64_DYNAREC] Added scalar SSE 66 0F 3A 60/61/62 opcodes (#2963)Yang Liu2025-08-222-1/+123
| | | | | * [RV64_DYNAREC] Added scalar SSE 66 0F 3A 60/61/62 opcodes * [CI] Bump timeout
* [RV64_DYNAREC] Added more scalar avx 66 0F opcodes (#2960)Yang Liu2025-08-222-1/+226
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2961)Yang Liu2025-08-214-0/+104
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* [RV64_DYNAREC] Fixed more scalar avx opcodes (#2959)Yang Liu2025-08-211-11/+9
| | | | | * [RV64_DYNAREC] Fixed more scalar avx opcodes * oops
* [RV64_DYNAREC] Fixed some scalar avx opcodes (#2956)Yang Liu2025-08-213-7/+12
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* [RV64_DYNAREC] Added more scalar avx 66 0F3A opcodes (#2955)Yang Liu2025-08-211-0/+184
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* [RV64_DYNAREC] Added more scalar avx 66 0F38 opcodes (#2954)Yang Liu2025-08-211-0/+389
| | | | | * [RV64_DYNAREC] Added more scalar avx 66 0F38 opcodes * fix
* [RV64_DYNAREC] Added more scaalr avx opcodes (#2952)Yang Liu2025-08-195-16/+163
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* [RV64_DYNAREC] Added more scalar avx opcodes (#2951)Yang Liu2025-08-192-1/+193
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* [RV64_DYNAREC] Added more avx scalar 66 0F38 opcodes (#2950)Yang Liu2025-08-193-65/+83
| | | | | * [RV64_DYNAREC] Added more avx scalar 66 0F38 opcodes * more
* [RV64_DYNAREC] Added a few more scalar AVX 66 0F38 opcodes (#2949)Yang Liu2025-08-187-42/+451
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* [RV64_DYNAREC] Added scalar AVX VMOVDQA opcodes (#2948)Yang Liu2025-08-181-0/+42
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* [RV64_DYNAREC] Added more scalar AVX opcodes (#2945)Yang Liu2025-08-182-2/+127
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* [LA64_DYNAREC] Added more scalar AVX opcodes (#2943)Yang Liu2025-08-153-1/+130
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