about summary refs log tree commit diff stats
path: root/src/dynarec (follow)
Commit message (Expand)AuthorAgeFilesLines
...
* Added 64 66 83 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-03-142-1/+107
* [ARM64_DYNAREC] Try to improve strongmem=4 method, with a completly different...ptitSeb2024-03-132-12/+14
* [LA64_DYNAREC] Added more LBT instructions to the printer (#1356)Yang Liu2024-03-112-28/+168
* [LA64_DYNAREC] Added more opcodes and some fixes (#1355)Yang Liu2024-03-118-16/+210
* [LA64_DYNAREC] Added more opcodes (#1354)Yang Liu2024-03-114-176/+313
* [DYNAREC] Limit temporary memory allocation on FillBlock64ptitSeb2024-03-107-50/+40
* [ARM64_DYNAREC] Added 64/65 0B opcodeptitSeb2024-03-101-0/+10
* [ARM64_DYNAREC] Fixed printer for MVN with shiftptitSeb2024-03-101-2/+2
* [ARM64_DYNAREC][RV64_DYNAREC] Fixed some case where MOVS/B/W/D/Q is used on a...ptitSeb2024-03-083-5/+6
* POPF opcode should not overwrite IF bitptitSeb2024-03-082-2/+3
* [ARM64_DYNAREC] Added 66 64 0F 6F opcode (for #1349)ptitSeb2024-03-081-30/+47
* [ARM64_DYNAREC] Added 67 64 8B opcodeptitSeb2024-03-081-0/+13
* [ARM64_DYNAREC] Added 67 64 8F opcodeptitSeb2024-03-081-0/+13
* [ARM64_DYNAREC] Improved MOV32w and MOV64x with a funciton with more speciall...ptitSeb2024-03-083-23/+84
* [DYNAREC] Revert some fasly changes to the shift opcodes (#1346)Yang Liu2024-03-087-297/+306
* [DYNAREC] Made shift operations handle count==0 more uniformly (#1345)Yang Liu2024-03-0810-282/+378
* [ARM64_DYNAREC] Fixed a falsy optimization on PSHUFHW (#1344)Yang Liu2024-03-081-6/+6
* [ARM64_DYNAREC] Use convert_bitmask in logic emitters and in MAX32w and MOV64xptitSeb2024-03-073-26/+81
* [ARM64_DYNAREC] Added 0F E1 opcodeptitSeb2024-03-071-1/+14
* [LA64_DYNAREC] Added C1 /4 and /6 opcodes and some fix (#1341)Haichen Wu2024-03-074-10/+140
* [ARM] Added immediate encoding (#1340)rajdakin2024-03-072-0/+93
* [ARM64_DYNAREC] Slightly better trace when dynarec log unknown opcodeptitSeb2024-03-071-1/+1
* [TRACE] Improved logs on NULL-sized blockptitSeb2024-03-071-0/+6
* [ARM64_DYNAREC] Fixed F0 0F AB opcodeptitSeb2024-03-071-1/+1
* [ARM64_DYNAREC] A bot more work on shift opcodesptitSeb2024-03-071-27/+17
* [ARM64_DYNAREC] Small optim to SAHF & more cosmetics stuffsptitSeb2024-03-062-5/+4
* [RV64_DYNAREC] Added 66 0F 38 61 PCMPESTRI opcode and some refactors too (#1337)Yang Liu2024-03-064-133/+108
* [ARM64_DYNAREC] Fixed some typos (#1336)Yang Liu2024-03-061-3/+3
* [LA64_DYNAREC] Added more opcodes and more instructions in emitter and printe...Yang Liu2024-03-053-0/+57
* [LA64_DYNAREC] Added more opcodes and some fixes too (#1331)Yang Liu2024-03-057-4/+226
* [LA64_DYNAREC] Added more opcodes and some fixes in the printer (#1330)Yang Liu2024-03-055-15/+199
* [LA64_DYNAREC] Made eflags synchronization lazy (#1329)Yang Liu2024-03-0510-101/+122
* [LA64_DYNAREC] Added more opcodes (#1327)Yang Liu2024-03-047-7/+213
* [LA64_DYNAREC] Added more and more opcodes (#1326)Yang Liu2024-03-047-7/+339
* [LA64_DYNAREC] Utilizing bitmanip instructions because they're great (#1324)Yang Liu2024-03-045-126/+86
* [ARM64_DYNAREC] Small optims for SSE/SSE2 & strongmem>1ptitSeb2024-03-044-13/+19
* Added DF D0..D7 ([ARM64_DYNAREC] too)ptitSeb2024-03-041-0/+19
* [ARM64_DYNAREC] Stop a block on CC opcode (unless they are ignored)ptitSeb2024-03-041-0/+2
* [LA64_DYNAREC] Added more opcodes (#1322)Haichen Wu2024-03-041-0/+24
* [TRACE] Better trace when trying to run on very low addressptitSeb2024-03-041-0/+3
* [LA64_DYNAREC] Added more opcodes (#1321)Yang Liu2024-03-046-1/+281
* Added 64 66 0F 7F opcode ([ARM64_DYNAREC] too) (for #1320)ptitSeb2024-03-041-0/+15
* [LA64_DYNAREC] Added more opcodes and more fixes, SuperHexagon is working (#1...Yang Liu2024-03-0310-93/+531
* [LA64_DYNAREC] Enable co-simulation and fixed an important issue (#1317)Yang Liu2024-03-032-8/+26
* [LA64_DYNAREC] Added more and more opcodes (#1314)Yang Liu2024-03-028-15/+571
* [LA64_DYNAREC] Added more opcodes (#1313)Yang Liu2024-03-023-1/+108
* [LA64_DYNAREC] Added CC native call support, fixed call_c (#1312)Yang Liu2024-03-024-26/+163
* [ARM64_DYNAREC] More fixes and optim on IMUL flagsptitSeb2024-03-022-13/+49
* [ARM64_DYNAREC] Fixed flags for 69 opcode, and small optim for 0F AF opcodeptitSeb2024-03-022-37/+36
* [ARM64_DYNAREC] Small optim on some cases of F2 0F 70 opcodeptitSeb2024-03-021-11/+21