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* [ARM64_DYNAREC] Small optim on flags handlingptitSeb2024-04-2210-70/+69
* [ARM64_DYNAREC] Improved some specific cases of pcmpestri opcodeptitSeb2024-04-223-23/+152
* [ARM64_PRINTER] Added SHL printerptitSeb2024-04-221-0/+11
* [ARM64_PRINTER] Fix some case of DecodeBit not working for 64bits valuesptitSeb2024-04-201-3/+5
* Added 66 68 opcode ([ARM64_DYNAREC] too)ptitSeb2024-04-171-0/+6
* [DYNAREC] Fixed CF flag computation (#1453)Yang Liu2024-04-172-12/+22
* [RV64_DYNAREC] Added more opcodes (#1451)ZoHan2024-04-171-0/+22
* [LA64_DYNAREC] Added more opcodes (#1447)Yang Liu2024-04-149-4/+284
* [LA64_DYNAREC] Added 1 more opcode and some fixes too (#1444)Yang Liu2024-04-145-4/+89
* [DYNAREC] Fixed shift xw macros (#1443)Yang Liu2024-04-142-14/+47
* Fixed a few warning here and there...ptitSeb2024-04-131-9/+0
* [LA64_DYNAREC] Added more opcodes (#1441)Yang Liu2024-04-125-0/+184
* [RV64_DYNAREC] Fixed 66 C7 MOV opcode (#1440)Yang Liu2024-04-121-3/+2
* [LA64_DYNAREC] Added more opcodes and fixed more issues (#1439)Yang Liu2024-04-124-6/+113
* [LA64_DYNAREC] Made the CALLRET optimization complete (#1438)Yang Liu2024-04-123-0/+59
* [RV64_DYNAREC] Implementation of some CRC32 instructions (#1435)kaixindeken2024-04-122-1/+58
* [LA64_DYNAREC] Small fix on emit_or32c LBT path (#1436)Yang Liu2024-04-111-1/+4
* [LA64_DYNAREC] Added more opcodes to the printer (#1433)Yang Liu2024-04-103-429/+1963
* [LA64_DYNAREC] Refined MOV64 macros (#1430)Yang Liu2024-04-093-28/+48
* [ARM64_DYNAREC] Small change to stay in sync with other backendptitSeb2024-04-071-2/+2
* Fixed 0F A3 BT opcode (#1427)Yang Liu2024-04-072-1/+11
* [RV64_DYNAREC] Fixed various bugs in shift instructions (#1426)xctan2024-04-074-146/+764
* [LA64_DYNAREC] Added more opcodes (#1425)Yang Liu2024-04-067-10/+272
* [LA64_DYNAREC] Added more opcodes (#1424)Yang Liu2024-04-064-2/+260
* [LA64_DYNAREC] Added more opcode and fixes (#1423)Yang Liu2024-04-066-7/+117
* [LA64_DYNAREC] Added more opcodes (#1422)Yang Liu2024-04-064-4/+202
* [LA64_DYNAREC] Added more SSE/SSE2 instructions (#1421)Haichen Wu2024-04-062-0/+50
* [LA64_DYNAREC] Fixed missing LBT path and more (#1419)Yang Liu2024-04-063-16/+25
* [DYNAREC] Fixed REP opcodes for correct register state recovery (#1420)Yang Liu2024-04-063-9/+9
* [LA64_DYNAREC] Added more opcodes (#1418)Yang Liu2024-04-055-2/+205
* [LA64_DYNAREC] Added more opcodes (#1417)Yang Liu2024-04-056-2/+265
* [LA64_DYNAREC] Added more opcodes (#1416)Yang Liu2024-04-057-3/+295
* [LA64_DYNAREC] Fixed SSE issues (#1415)Yang Liu2024-04-052-15/+18
* [LA64_DYNAREC] Added more SSE/SSE2 instructions (#1410)Haichen Wu2024-04-045-0/+149
* [RV64_DYNAREC] Added 0F 70 PSHUFW opcode (#1408)Yang Liu2024-04-031-0/+15
* [RV64_DYNAREC] Add 1E/1F opcode (#1407)ZoHan2024-04-031-4/+27
* [RV64_DYNAREC] Add more opcodes (#1405)ZoHan2024-04-031-0/+36
* [ARM64_DYNAREC] Better fix for #1366, that should help #1383)ptitSeb2024-04-024-6/+5
* [DYNAREC] Small fixed on dynarec block protectionptitSeb2024-04-021-1/+1
* [DYNAREC] Improved CancelBlock function (might help #1383)ptitSeb2024-04-021-1/+1
* [RV64_DYNAREC] Fixed some issue with x87 stack managment (ported from ARM64) ...Yang Liu2024-04-021-12/+18
* [LA64_DYNAREC] Added more SSE/SSE2 instructions (#1400)Yang Liu2024-04-025-4/+154
* [LA64_DYNAREC] Fixed EBBACK (#1399)Yang Liu2024-04-022-10/+10
* [ARM64_DYNAREC] Fixed some issue with x87 stack managmentptitSeb2024-03-293-24/+31
* [LA64_DYNAREC] Added basic SSE infra and 66 0F 6E MOVD opcode (#1391)Yang Liu2024-03-287-28/+718
* [ARM64_DYNAREC] More check to abort a block if x87 stack cache is incoherentptitSeb2024-03-262-1/+12
* [LA64_DYNAREC] Added CMOVcc opcodes and some fixes too (#1375)Yang Liu2024-03-203-23/+44
* [LA64_DYNAREC] Added some FP/LSX/LASX instructions to the emitter (#1374)Yang Liu2024-03-201-1/+833
* [DYNAREC] This should fix some issue with dynarec, like #1366 (but should be ...ptitSeb2024-03-191-6/+7
* Changed, again, RDTSC and Hardware counter, introducing auto calibration when...ptitSeb2024-03-142-0/+12