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* Added 64 66 83 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-03-142-1/+107
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* [ARM64_DYNAREC] Try to improve strongmem=4 method, with a completly ↵ptitSeb2024-03-132-12/+14
| | | | different approach
* [LA64_DYNAREC] Added more LBT instructions to the printer (#1356)Yang Liu2024-03-112-28/+168
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* [LA64_DYNAREC] Added more opcodes and some fixes (#1355)Yang Liu2024-03-118-16/+210
| | | | | | | | | | | | | * Added F0 B1 /0 LOCK CMPXCHG opcode * Added 0F BE MOVSX opcode * Added 81/83 /7 CMP opcodes * Fixed emit_shl32c * Added missing default * Added A0 MOV opcode
* [LA64_DYNAREC] Added more opcodes (#1354)Yang Liu2024-03-114-176/+313
| | | | | | | | | | | | | | | * Added 38 CMP opcode * Added 0F B6 MOVZX opcode * Added 88 MOV opcode * Fixed 0F B6 MOVZX opcode * Added 81/83 LOCK ADD opcodes * Added 98 CWDE opcode * Rebase
* [DYNAREC] Limit temporary memory allocation on FillBlock64ptitSeb2024-03-107-50/+40
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* [ARM64_DYNAREC] Added 64/65 0B opcodeptitSeb2024-03-101-0/+10
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* [ARM64_DYNAREC] Fixed printer for MVN with shiftptitSeb2024-03-101-2/+2
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* [ARM64_DYNAREC][RV64_DYNAREC] Fixed some case where MOVS/B/W/D/Q is used on ↵ptitSeb2024-03-083-5/+6
| | | | a protected page of code, and SI gets wrongly incremented (for #1347)
* POPF opcode should not overwrite IF bitptitSeb2024-03-082-2/+3
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* [ARM64_DYNAREC] Added 66 64 0F 6F opcode (for #1349)ptitSeb2024-03-081-30/+47
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* [ARM64_DYNAREC] Added 67 64 8B opcodeptitSeb2024-03-081-0/+13
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* [ARM64_DYNAREC] Added 67 64 8F opcodeptitSeb2024-03-081-0/+13
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* [ARM64_DYNAREC] Improved MOV32w and MOV64x with a funciton with more ↵ptitSeb2024-03-083-23/+84
| | | | speciall cases
* [DYNAREC] Revert some fasly changes to the shift opcodes (#1346)Yang Liu2024-03-087-297/+306
| | | | | | | | | | | | | * [DYNAREC] Revert some fasly changes to the shift opcodes * Prefer ZEROUP * More fixes * Fixed one more typo * Should not revert this * Fix fix fix
* [DYNAREC] Made shift operations handle count==0 more uniformly (#1345)Yang Liu2024-03-0810-282/+378
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* [ARM64_DYNAREC] Fixed a falsy optimization on PSHUFHW (#1344)Yang Liu2024-03-081-6/+6
| | | | | * [ARM64_DYNAREC] Reverted a falsy optimization on PSHUFHW * Fix it instead of a lazy revert
* [ARM64_DYNAREC] Use convert_bitmask in logic emitters and in MAX32w and MOV64xptitSeb2024-03-073-26/+81
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* [ARM64_DYNAREC] Added 0F E1 opcodeptitSeb2024-03-071-1/+14
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* [LA64_DYNAREC] Added C1 /4 and /6 opcodes and some fix (#1341)Haichen Wu2024-03-074-10/+140
| | | | | * [LA64_DYNAREC] Added C1 /4 and /6 opcodes * [LA64_DYNAREC] Some fix of C1 opcodes
* [ARM] Added immediate encoding (#1340)rajdakin2024-03-072-0/+93
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* [ARM64_DYNAREC] Slightly better trace when dynarec log unknown opcodeptitSeb2024-03-071-1/+1
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* [TRACE] Improved logs on NULL-sized blockptitSeb2024-03-071-0/+6
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* [ARM64_DYNAREC] Fixed F0 0F AB opcodeptitSeb2024-03-071-1/+1
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* [ARM64_DYNAREC] A bot more work on shift opcodesptitSeb2024-03-071-27/+17
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* [ARM64_DYNAREC] Small optim to SAHF & more cosmetics stuffsptitSeb2024-03-062-5/+4
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* [RV64_DYNAREC] Added 66 0F 38 61 PCMPESTRI opcode and some refactors too (#1337)Yang Liu2024-03-064-133/+108
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* [ARM64_DYNAREC] Fixed some typos (#1336)Yang Liu2024-03-061-3/+3
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* [LA64_DYNAREC] Added more opcodes and more instructions in emitter and ↵Yang Liu2024-03-053-0/+57
| | | | printer (#1332)
* [LA64_DYNAREC] Added more opcodes and some fixes too (#1331)Yang Liu2024-03-057-4/+226
| | | | | | | | | | | | | * [LA64_DYNAREC] Added 66 90..97 NOP/XCHG opcodes * Added AB REP STOSD opcode * Fixed a bug in emit_sar32c * [LA64_DYNAREC] Added 0F B7 MOVZX opcode * Why I keep forgetting the TO_LA64 thing?! * Added 20..24 AND opcodes
* [LA64_DYNAREC] Added more opcodes and some fixes in the printer (#1330)Yang Liu2024-03-055-15/+199
| | | | | | | | | | | * Added 90..97 NOP/XCHG opcodes * More instructions and fixes to the emitter and printer * Added F0 0F C1 LOCK XADD opcode * Fix * Fix
* [LA64_DYNAREC] Made eflags synchronization lazy (#1329)Yang Liu2024-03-0510-101/+122
| | | | | | | * [LA64_DYNAREC] Made eflags synchronization lazy * A smol optim * Fixed CLEAR_FLAGS
* [LA64_DYNAREC] Added more opcodes (#1327)Yang Liu2024-03-047-7/+213
| | | | | | | | | | | | | | | | | | | * [LA64_DYNAREC] Added F7 /2 NOT opcode * [LA64_DYNAREC] Added 09 OR opcode * [LA64_DYNAREC] Added 64 MOVSXD opcode * [LA64_DYNAREC] Added more instructions to the emitter and printer, and fixed typos * Remove unused code * [LA64_DYNAREC] Added D3 /4 /6 SHL opcode * [LA64_DYNAREC] Added 0D OR opcode * [LA64_DYNAREC] Fixed a bug when LBT is present * Revert
* [LA64_DYNAREC] Added more and more opcodes (#1326)Yang Liu2024-03-047-7/+339
| | | | | | | | | | | | | | | | | | | * [LA64_DYNAREC] Added 81/83 /1 OR opcode * [LA64_DYNAREC] Added F6 /0 /1 TEST opcode * Added A9 TEST opcode * Added A8 TEST opcode * [LA64_DYNAREC] Added 80 /4 AND opcode * [LA64_DYNAREC] Added 0F 90..9F SETcc opcodes * [LA64_DYNAREC] Added 84 TEST opcode * [LA64_DYNAREC] Added 0F 01 XGETBV opcode * [LA64_DYNAREC] Added E0..E3 opcodes
* [LA64_DYNAREC] Utilizing bitmanip instructions because they're great (#1324)Yang Liu2024-03-045-126/+86
| | | | | | | * [LA64_DYNAREC] Added bitmanip instructions to emitter and printer * [LA64_DYNAREC] Utilizing bitmanip instructions because they're great * Review
* [ARM64_DYNAREC] Small optims for SSE/SSE2 & strongmem>1ptitSeb2024-03-044-13/+19
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* Added DF D0..D7 ([ARM64_DYNAREC] too)ptitSeb2024-03-041-0/+19
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* [ARM64_DYNAREC] Stop a block on CC opcode (unless they are ignored)ptitSeb2024-03-041-0/+2
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* [LA64_DYNAREC] Added more opcodes (#1322)Haichen Wu2024-03-041-0/+24
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* [TRACE] Better trace when trying to run on very low addressptitSeb2024-03-041-0/+3
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* [LA64_DYNAREC] Added more opcodes (#1321)Yang Liu2024-03-046-1/+281
| | | | | | | | | | | | | | | * [LA64_DYNAREC] Added 0F 80..8F Jcc opcodes * [LA64_DYNAREC] Added 31/33 XOR opcodes * [LA64_DYNAREC] Added 0F A2 CPUID opcode * [LA64_DYNAREC] Added 81/83 /4 AND opcode * [LA64_DYNAREC] Added 25 AND opcode * [LA64_DYNAREC] Added F7 /0 /1 TEST opcodes * Fix
* Added 64 66 0F 7F opcode ([ARM64_DYNAREC] too) (for #1320)ptitSeb2024-03-041-0/+15
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* [LA64_DYNAREC] Added more opcodes and more fixes, SuperHexagon is working ↵Yang Liu2024-03-0310-93/+531
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (#1319) * Made printer slightly better * [SIGNAL] Fixed a typo * Removed useless comma * Another typo * Keep'em in order * Added more opcodes and more fixes * A big fix of GOCOND macro * [LA64_DYNAREC] Added E8 CALL opcode * [LA64_DYNAREC] Added C6 MOV opcode * [LA64_DYNAREC] Added 39 CMP opcode * [LA64_DYNAREC] Added 0F 1F NOP opcode * BEWARE: shift instructions are NOT sign-extended! * More fixes * Try to be safe * Fixed printer * Fixed emitter & printer for B, briing superhexagon back
* [LA64_DYNAREC] Enable co-simulation and fixed an important issue (#1317)Yang Liu2024-03-032-8/+26
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* [LA64_DYNAREC] Added more and more opcodes (#1314)Yang Liu2024-03-028-15/+571
| | | | | | | | | | | | | | | | | | | * [LA64_DYNAREC] Added C1 /5 SHR opcode * [LA64_DYNAREC] Added C1 /7 SAR opcode * [LA64_DYNAREC] Added D1 /7 SAR opcode * [LA64_DYNAREC] Added D1 /5 SHR opcode * [LA64_DYNAREC] Added FF /4 JMP opcode * [LA64_DYNAREC] Added 66 0F 1F NOP opcode * [LA64_DYNAREC] Added B8..BF MOV opcodes * [LA64_DYNAREC] Added C7 MOV opcode * [LA64_DYNAREC] Added 0F 05 SYSCALL opcode
* [LA64_DYNAREC] Added more opcodes (#1313)Yang Liu2024-03-023-1/+108
| | | | | * [LA64_DYNAREC] Added F30F 1E NOP opcode * [LA64_DYNAREC] Added E9/EB JMP opcodes
* [LA64_DYNAREC] Added CC native call support, fixed call_c (#1312)Yang Liu2024-03-024-26/+163
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* [ARM64_DYNAREC] More fixes and optim on IMUL flagsptitSeb2024-03-022-13/+49
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* [ARM64_DYNAREC] Fixed flags for 69 opcode, and small optim for 0F AF opcodeptitSeb2024-03-022-37/+36
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* [ARM64_DYNAREC] Small optim on some cases of F2 0F 70 opcodeptitSeb2024-03-021-11/+21
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