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* [RV64_DYNAREC] Added a fast path for some 16bit opcodes (#1765)Yang Liu2024-08-272-58/+73
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* [ARM64_DYNAREC] Small refactor around get_segdata usageptitSeb2024-08-272-11/+15
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* [RV64_DYNAREC] Added a fast path for some 8bit opcodes (#1763)Yang Liu2024-08-273-2/+75
| | | | | | | | | * [RV64_DYNAREC] Added a fast path for some 8bit opcodes * fix * more * more
* [ARM64_DYNAREC] Mark new upper YMM part as new, so the can be unwind too ↵ptitSeb2024-08-271-1/+2
| | | | (for #1759)
* Added preliminary Box32 support (#1760)ptitSeb2024-08-266-37/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Improve the ReserveHigMemory helper function * [BOX32] Added some wrapping infrastructure * [BOX32] More wrapped 32bits lib infrastructure * [BOX32] Added callback and tls 32bits handling * [BOX32] Added more 32bits, around wrappers and elfs * [BOX32] Added the 32bits version of myalign * [BOX32] More wrapped libs and 32bits fixes and imrpovments * [BOX32] Added some 32bits tests * [BOX32] Try to enable some Box32 build and test on the CI * [BOX32] Disable Box32 testing on CI platform that use qemu * [BOX32] Another attempt to disable Box32 testing on CI platform that use qemu * [BOX32] Small fix for another attempt to disable Box32 testing on CI platform that use qemu * [BOX32] Yet another fix for another attempt to disable Box32 testing on CI platform that use qemu * [BOX32] Fixed a typo in CI script * [BOX32] Better scratch alighnment and enabled more tests * [BOX32] Added (partial) wrapped 32bits librt * [BOX32] Added mention of Box32 in README * [BOX32] Added phtread handling, and numerous fixes to 32bits handling. [ARM64_DYNAREC] Fixed access to segment with negative offset * [BOX32] Added system libs and cpp testing, plus some more fixes * [BOX32] Fix previous commit * [BOX32] Better stack adjustment for 32bits processes * [BOX32] Added getenv wrapped 32bits function and friends * [BOX32] Don't look for box86 for a Box32 build * [BOX32] Don't do 32bits cppThreads test for now on CI * [BOX32] Enabled a few more 32bits tests * [BOX32] For ld_lib_path for both CppThreads tests * [BOX32] [ANDROID] Some Fixes for Android Build * [BOX32] Still need to disable cppThread_32bits test on CI for some reason * [BOX32] [ANDROID] Don't show PreInit Array Warning (#1751) * [BOX32] [ANDROID] One More Fix for Android Build That I forgotten to … (#1752) * [BOX32] [ANDROID] One More Fix for Android Build That I forgotten to push before * [BOX32] [ANDROID] Try to Create __libc_init * [BOX32] [ANDROID] Try to disable NEEDED_LIBS for now (libdl is not wrapped) * [BOX32] Updated generated files * [BOX32] Added 32bits context functions * [BOX32] Added 32bits signal handling * [BOX32] Added some missing 32bits elfloader functions * [BOX32] Fix build on x86_64 machine * [BOX32] Better fix for x86_64 build * [BOX32] Actually added missing libs, and re-enabled cppThreads_32bits test * [BOX32] Added wrapped 32bits libdl * [BOX32] Try to re-enabled Box32 test on CI for ARM64 builds * [BOX32] fine-tuning Box32 test on CI for ARM64 builds * [BOX32] More fine-tuning to Box32 test on CI for ARM64 builds * [BOX32] Enabled Box32 test on CI for LA64 and RV64 builds too * [BOX32] re-Disabled Box32 test on CI for LA64 and RV64 builds, not working for now * [BOX32] Temporarily disabled cppThreads_32bits test on CI --------- Co-authored-by: KreitinnSoftware <pablopro5051@gmail.com> Co-authored-by: KreitinnSoftware <80591934+KreitinnSoftware@users.noreply.github.com>
* [RV64_DYNAREC] Fix some typos in docs and dynarec/rv64 (#1758)WANG Guidong2024-08-269-24/+24
| | | | | | | | | | | * [Typo] fix some typo in docs and dynarec/rv64 * [Typo] fix some typo in docs and dynarec/rv64 * [Typo] fix some typo in dynarec/rv64 * [Typo] fix some typo in dynarec/rv64 * [Typo] fix some typo in docs
* [EMU] [ARM64_DYNAREC] Fix Some Warnings on Clang Compilers (#1757)KreitinnSoftware2024-08-261-1/+1
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* [RV64_DYNAREC] Fixed more issues in the vector infrastructure (#1755)Yang Liu2024-08-258-66/+85
| | | | | | | | | | | | | * [RV64_DYNAREC] Fixed SEW transformation for vector * more tweaks * more fixes * More fixes * more fixes * re-enable vector extension by default
* More fixesYang Liu2024-08-251-2/+2
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* Try to fix SSE type transformationYang Liu2024-08-243-29/+61
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* [RV64,LA64_DYNAREC] Remove useless #if directivesYang Liu2024-08-202-11/+1
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* Merge branch 'box32' into mainptitSeb2024-08-181-1/+1
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| * warn only onceYang Liu2024-08-181-1/+3
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| * Slightly improved LOCK CMPXCHG16B opcodeYang Liu2024-08-181-4/+6
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| * [RV64_DYNAREC] Added a warning on LOCK CMPXCHG16B opcodeYang Liu2024-08-181-0/+1
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| * [BOX32] prepare elfheader_t structure for 32bits elfsptitSeb2024-08-171-1/+1
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| * [RV64_DYNAREC] Added more opcodes (#1740)Yang Liu2024-08-164-47/+145
| | | | | | | | | | | | | | * [RV64_DYNAREC] Added more opcodes * more opcodes * more
| * [LA64_DYNAREC] Port recent RV64 fixes (#1739)Yang Liu2024-08-165-43/+55
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| * [RV64_DYNAREC] Added 66 0F 3A 63 PCMPISTRI opcode (#1735)Yang Liu2024-08-162-10/+39
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| * [RV64,LA64_DYNAREC] Small change when handling long CC INT 3 opcode (#1736)Yang Liu2024-08-162-2/+6
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* | [RV64_DYNAREC] Set the log level to Info for the LOCK CMPXCHG16B warning, to ↵ptitSeb2024-08-181-1/+1
| | | | | | | | avoid breaking winetricks
* | warn only onceYang Liu2024-08-171-1/+3
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* | Slightly improved LOCK CMPXCHG16B opcodeYang Liu2024-08-171-4/+6
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* | [RV64_DYNAREC] Added a warning on LOCK CMPXCHG16B opcodeYang Liu2024-08-171-0/+1
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* | [RV64_DYNAREC] Added more opcodes (#1740)Yang Liu2024-08-164-47/+145
| | | | | | | | | | | | | | * [RV64_DYNAREC] Added more opcodes * more opcodes * more
* | [LA64_DYNAREC] Port recent RV64 fixes (#1739)Yang Liu2024-08-165-43/+55
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* | [RV64_DYNAREC] Added 66 0F 3A 63 PCMPISTRI opcode (#1735)Yang Liu2024-08-162-10/+39
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* | [RV64,LA64_DYNAREC] Small change when handling long CC INT 3 opcode (#1736)Yang Liu2024-08-152-2/+6
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* [ARM64_DYNAREC] Small change when handling lone CC INT 3 opcodeptitSeb2024-08-151-1/+3
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* [ARM64_DYNAREC] Added AVX.66.0F38 A6 opcodeptitSeb2024-08-151-3/+24
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* [ARM64_DYNAREC] Added 67 90..97 opcodesptitSeb2024-08-151-0/+19
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* [RV64_DYNAREC] Fixed extcacheUnwind regression (#1734)Yang Liu2024-08-151-8/+6
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* [RV64_DYNAREC] Fixed 0F BA /5 BTS opcode (#1733)Yang Liu2024-08-121-2/+1
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* [RV64_DYNAREC] More fixes (#1732)xctan2024-08-122-4/+4
| | | | | | | * [RV64_DYNAREC] Fixed pending flag type in emit_sar16 * [RV64_DYNAREC] Fixed imm12 overflow in geted * [SYSCALL] Added fake sys_init_module
* [ARM64_DYNAREC] Some small improvments to ROR/ROL/RCR/RCL opcodesptitSeb2024-08-115-110/+36
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* [RV64_DYNAREC] Fixed flags for shrd/shld with constant 0 shift (#1730)Yang Liu2024-08-101-13/+23
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* [RV64_DYNAREC] Fixed ROL/ROR RCX, CL (#1729)xctan2024-08-102-22/+14
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* Added 67.AVX.0F.66 D6 opcode ([ARM64_DYNAREC] too)ptitSeb2024-08-101-0/+21
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* Added 64bits 67 F3 0F 7F opcode ([ARM64_DYNAREC] too)ptitSeb2024-08-101-0/+13
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* [ARM64_DYNAREC] Fixed flags for surd/shld with constant 0 shiftptitSeb2024-08-101-12/+22
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* [ARM64_DYNAREC] Fixed pending flags for large 8 & 16 bit const shiftsptitSeb2024-08-101-0/+6
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* [RV64_DYNAREC] Fixed pending flags for large 8 & 16 bit const shifts (#1728)xctan2024-08-101-0/+6
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* [RV64_DYNAREC] Fixed more register conflicts (#1726)Yang Liu2024-08-093-8/+8
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* [RV64_DYNAREC] Fixed OF generation in emit_sar16c (#1724)xctan2024-08-091-10/+4
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* [ARM64_DYNAREC] Added AVX.66.0F38 9A opcodeptitSeb2024-08-091-2/+13
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* [RV64_DYNAREC] Fixed fpu_flags handling and enabled cosim in CI (#1722)Yang Liu2024-08-091-0/+3
| | | | | * [RV64_DYNAREC] Fixed fpu_flags handling * repeat until-pass
* [RV64_DYNAREC] Fixed misused BNE_NEXT in emit_ro{l,r}32 (#1723)xctan2024-08-091-4/+6
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* [RV64_DYNAREC] Fixed FNSTSW opcode (#1721)Yang Liu2024-08-092-0/+5
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* [DYNAREC_RV64] Removed TODOs on GETEX and GETEM macros (#1720)Yang Liu2024-08-096-306/+303
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* [RV64_DYNAREC] Fixed register conflict in the GETSEB marco (#1719)xctan2024-08-091-1/+1
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