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* Just clear AF flags on pcmp[i/e]stri helperptitSeb2024-05-271-1/+2
* [INTERPRETER] Added some more avx opcodesptitSeb2024-05-273-0/+86
* [INTERPRETER] Some fixes and small refactor on avx handlingptitSeb2024-05-273-111/+163
* [INTERPRETER] Added avx (66 0F 38) 00 opcodeptitSeb2024-05-274-2/+103
* [INTERPRETER] Added avx (66 0F 3A) 0F opcodeptitSeb2024-05-271-0/+32
* [INTERPRETER] Added avx (F3 0F) 7F opcodeptitSeb2024-05-271-6/+16
* [INTERPRETER] Added avx (66 0F 3A) 44 opcodeptitSeb2024-05-277-14/+181
* [INTERPRETER] Added avx (66 0F) 6F ocpodeptitSeb2024-05-271-0/+16
* [INTERPRETER] Added avx (66 0F) 6C/6D opcode and even more fixes to some avx ...ptitSeb2024-05-261-22/+58
* [INTERPRETER] Added avx (66 0F) DB opcode and more fixes to some avx opcodesptitSeb2024-05-261-10/+28
* [INTERPRETER] Added avx (66 0F) EB opcode and fixed other avx opcodesptitSeb2024-05-262-38/+72
* [INTERPRETER] Added avx (66 0F) 64/65/66/72/73/EF opcodesptitSeb2024-05-261-2/+173
* [INTERPRETER] Added avx (F3 0F) 6F and (66 0F) 70ptitSeb2024-05-268-18/+263
* Added 67 66 83 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-05-261-0/+23
* Fixed xrstor helperptitSeb2024-05-261-1/+1
* [INTERPRETER] my first avx opcodeptitSeb2024-05-265-12/+177
* Added 67 66 0F D6 ([ARM64_dynarec] too)ptitSeb2024-05-251-0/+9
* [TRACE] Group trace member of x64emu_tptitSeb2024-05-241-4/+2
* more avx infrastructureptitSeb2024-05-245-19/+65
* Added support for XSAVE/XRSTOR ([ARM64_DYNAREC] too)ptitSeb2024-05-243-5/+107
* Some more x87 adjustment, but it still off a bitptitSeb2024-05-232-5/+5
* More fixes to x87 handlingptitSeb2024-05-231-27/+45
* Fixed some x87 handling issuesptitSeb2024-05-221-7/+7
* [DYNAREC] Simplified emit_pf helper (#1518)Yang Liu2024-05-221-5/+0
* [INTERPRETER] Added more opcodes and fixed some opcodes too (#1511)Yang Liu2024-05-211-11/+116
* [INTERPRETER] Fixed CMPXCHG16B opcode for la64 (#1506)Yang Liu2024-05-201-1/+1
* [ARM64_DYNAREC] Some various fixes after double-check of codeptitSeb2024-05-191-5/+6
* [INTERPRETER] Added unaligned handling for 32bits F0 83 /0 opcodeptitSeb2024-05-191-1/+5
* Added 2 new syscallsptitSeb2024-05-171-0/+2
* [ARM64_DYNAREC] Improved stability of RCL/RCR and added 32/64 bits with const...ptitSeb2024-05-171-31/+1
* [COSIM] Small change for D9 /6 opcodeptitSeb2024-05-151-3/+1
* [COSIM] Fixed issue with 0F C7 opcodeptitSeb2024-05-151-5/+1
* [INTERPRETER] Added 1 unligned case for F0 83 groupptitSeb2024-05-131-1/+5
* [ARM64_DYNAREC] Fix and improvments on rcl/rcr helperptitSeb2024-05-091-2/+13
* [TRACE] Remove a trace that might crash when tracingptitSeb2024-05-021-1/+1
* [COSIM] Added thread-safe tests (#1477)Yang Liu2024-04-307-5/+115
* [INTERPRETER] Fixed pcmp[ei]strm opcodesptitSeb2024-04-281-8/+8
* [TRACE] Added C3..C0 to x87 traceptitSeb2024-04-281-0/+2
* Changed x87 way of handling FFREE opcode ([DYNAREC] too, improving x87 robust...ptitSeb2024-04-247-32/+40
* [INTERPRETER] Improved SSE4.2 String opcodes, and improved test27ptitSeb2024-04-221-3/+9
* [ANDOIRD] Fix buildptitSeb2024-04-221-2/+0
* [TRACE] Fixed some dumpreg when x87stack is incoherentptitSeb2024-04-221-1/+3
* [ANDROID] Try to fix test 07ptitSeb2024-04-221-0/+7
* Added 66 68 opcode ([ARM64_DYNAREC] too)ptitSeb2024-04-171-0/+4
* Fixed a few warning here and there...ptitSeb2024-04-132-206/+206
* [INTERPRETER] Added aligned path to F0 0F C7 opcodeptitSeb2024-04-031-0/+37
* Added 66 0F BF opcodeptitSeb2024-03-211-0/+9
* Changed, again, RDTSC and Hardware counter, introducing auto calibration when...ptitSeb2024-03-141-0/+4
* Added 64 66 83 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-03-141-0/+25
* [TRACE] Better trace for (f)getxattrptitSeb2024-03-081-0/+6