about summary refs log tree commit diff stats
path: root/src (follow)
Commit message (Expand)AuthorAgeFilesLines
...
* [LA64_DYNAREC] Add adc8, adc8c, adc16 and testadc (#2069)Leslie Zhai2024-11-256-0/+293
* [ARM64_DYNAREC] Use YIELD instead of WFE (#2066)Yang Liu2024-11-243-1/+15
* [CORE] Enhanced BOX64_DYNAREC_RV64NOEXT (#2065)xctan2024-11-241-32/+24
* [RV64_DYNAREC] Added, fixed, and optimized opcodes (#2059)xctan2024-11-245-119/+188
* [VULKAN] Added a new extension and a missing functionptitSeb2024-11-241-1/+5
* [ARM64_DYNAREC] Fix a regression, as 90 opcode is not always NOP depending on...ptitSeb2024-11-241-12/+14
* [ARM64_DYNAREC] Generate corresponding hint instruction for PAUSE (#2063)Yang Liu2024-11-242-9/+13
* [RV64_DYNAREC] Minor optimizations on CMPXCHG (#2062)Yang Liu2024-11-241-9/+3
* [ARM64_DYNAREC] Small optim for emit_shld32c CF flag computationptitSeb2024-11-231-2/+1
* [DYNAREC] Better detection of wait slotptitSeb2024-11-231-0/+15
* [BOX32] Removed a debug leftoverptitSeb2024-11-231-1/+1
* Reworked on mmap address alignments for a performance regression (#2057)Yang Liu2024-11-221-3/+2
* Slightly better way to decode wrappersptitSeb2024-11-211-1/+6
* Small fix for XSAVE/XRSTOR opcodes ([DYNAREC] too)ptitSeb2024-11-216-10/+10
* [LA64_DYNAREC] Added more opcodes for JDK (#2055)Yang Liu2024-11-215-1/+272
* [DYNAREC] Reuse strongmem infra for all backends (#2052)Yang Liu2024-11-21105-636/+302
* [RCFILE] More adjustments with new strongmemptitSeb2024-11-201-1/+1
* Removed another debug leftoverptitSeb2024-11-201-1/+1
* [TRACE] Don't try to decode a bridge if memory is not mapped or un-readableptitSeb2024-11-201-0/+4
* Removed a debug leftoverptitSeb2024-11-201-1/+1
* [ARM64_DYNAREC] More optimizations on strongmem emulation (#2051)Yang Liu2024-11-202-42/+43
* update pressure_vessel function with additional valid BOX86_LD_LIBRARY_PATH (...theofficialgman2024-11-201-1/+1
* [ARM64_DYNAREC] Added weakbarrier=2 to disable last write barriers (#2049)Yang Liu2024-11-193-17/+17
* [ARM64_DYNAREC] Re-enable weakbarrier for dmb.ishst (#2048)Yang Liu2024-11-191-4/+13
* [DYNAREC] Reworked strong memory emulation (#2043)Yang Liu2024-11-1916-200/+571
* [WRAPPER]my_dbus_message_get_args() args type error (#2042)liuli2024-11-195-4/+8
* Improved Signal handling ([ARM4_DYNAREC] too)ptitSeb2024-11-1811-41/+154
* [BOX32] Fixed previous commitptitSeb2024-11-181-0/+1
* [BOX32] Fixed long double handling on printf like functionsptitSeb2024-11-181-2/+9
* [ARM64_DYNAREC] Only propagate native flags if at least 1 opcode consume themptitSeb2024-11-171-7/+14
* [WRAPPER] Added last 2 wrapped function for libexpatptitSeb2024-11-174-2/+16
* [WRAPPER] Fixed an isue with __iso99_swcanf wrapped functionptitSeb2024-11-171-1/+1
* [WRAPPER] Added wrapped libzstd.so.1 support, with new wrapperhelperptitSeb2024-11-179-0/+693
* [ARM64_DYNAREC] Cancel native flags when an opcode use native flags not fully...ptitSeb2024-11-171-6/+9
* [DYNAREC] Mark existing block as dirty when re-creating a memory blockptitSeb2024-11-171-2/+11
* [TRACE] Use lower case hex on rbtreeptitSeb2024-11-171-6/+6
* [WRAPPER] Added 2 more wrapped function to libcrypto.so.3 (for #1271)ptitSeb2024-11-161-2/+2
* [WRAPPER][BOX32] Fixed a few wrapped functions (for hl2)ptitSeb2024-11-167-8/+22
* [ARM64_DYNAREC] Fixed potential issues with 0F A3/AB/B3/BB opcodesptitSeb2024-11-162-8/+13
* [INTERPRETER] Fixed potential issue with 0F A3 opcodeptitSeb2024-11-161-5/+5
* [ARM64_DYNAREC] Small optim in emit_sar8c helperptitSeb2024-11-161-2/+1
* Expose a few more CPU featuresptitSeb2024-11-161-0/+7
* Removed a debug leftoverptitSeb2024-11-161-1/+1
* Smal adjustment in singal handling for no-execution errorptitSeb2024-11-162-6/+7
* [WRAPPER] Fixed myStackAlignGVariantNew and refined the test too (#2038)Yang Liu2024-11-152-83/+34
* [ARM64_DYNAREC] Various fixes and improvments to a few random opcodesptitSeb2024-11-159-68/+161
* [DYNAREC] Zero'd upper 32bits of regs when switching to 32bits from 64bitsptitSeb2024-11-151-5/+18
* [INTERPRETER] Zero'd upper 32bits of regs when switching to 32bits from 64bitsptitSeb2024-11-151-21/+86
* [ARM64_DYNAREC] A few fixes to 8/16bits logic/math opcodesptitSeb2024-11-153-16/+16
* [TRACE] More info on signalptitSeb2024-11-151-3/+4