| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [RV64_DYNAREC] Added 68 PUSH opcode (#575) | xctan | 2023-03-16 | 1 | -1/+15 |
| * | [RV64_DYNAREC] Added 98 CWDE opcode (#574) | xctan | 2023-03-16 | 1 | -0/+31 |
| * | [RV64_DYNAREC] Added 70-7F Jcc condition jump opcodes, plus a ton of fixes an... | ptitSeb | 2023-03-16 | 13 | -83/+336 |
| * | [RV64_DYNAREC] Added (81/83) /7 CMP opcode (#571) | Yang Liu | 2023-03-16 | 5 | -15/+90 |
| * | [RV64_DYNAREC] Added 01 ADD opcode (#573) | xctan | 2023-03-16 | 3 | -3/+89 |
| * | [RV64_DYNAREC] Added {C1,D1} /{5,7} opcode and some fixes (#569) | xctan | 2023-03-16 | 4 | -4/+99 |
| * | [RV64_DYNAREC] Optimize MOV64 emitter (#572) | Yang Liu | 2023-03-16 | 3 | -41/+48 |
| * | [RV64_DYNAREC] Added F3 0F 1E NOP opcode (#570) | Yang Liu | 2023-03-16 | 3 | -3/+76 |
| * | [RV64_PRINTER] Added C2/RETN and C3/RET opocde, along with fixes to jmp_to_next | ptitSeb | 2023-03-15 | 3 | -15/+151 |
| * | [RV64_DYNAREC] A few more fixes to the printer | ptitSeb | 2023-03-15 | 1 | -1/+3 |
| * | [RV64_DYNAREC] Update rv64_printer with new reg allocation | ptitSeb | 2023-03-15 | 1 | -2/+2 |
| * | [RV64_DYNAREC] Added CC (and NativeCall) opcode, and shuffle around some xFla... | ptitSeb | 2023-03-15 | 6 | -24/+84 |
| * | [RV64_DYNAREC] Implemented a solutionfor the problematic F_OF flag (use F_OF2... | ptitSeb | 2023-03-15 | 6 | -6/+68 |
| * | [RV64_DYNAREC] Added E8 CALL opcode, and fixed some issue with many macros | ptitSeb | 2023-03-15 | 6 | -19/+329 |
| * | [RV64_DYNAREC] Added 80 /7 CMP opcode (#567) | Yang Liu | 2023-03-15 | 4 | -11/+120 |
| * | [RV64_DYNAREC] Added C6 MOV opcode (#566) | Yang Liu | 2023-03-15 | 1 | -0/+39 |
| * | [RV64_DYNAREC] Added 39 CMP opcode and some fixes (#565) | Yang Liu | 2023-03-15 | 4 | -55/+119 |
| * | Added 66 0F 38 29 PCMPEQQ opcde ([ARM64_DYNAREC] too) (for #558) | ptitSeb | 2023-03-14 | 2 | -0/+16 |
| * | [RV64_DYNAREC] Added {81,83} /0 ADD opcode (#564) | xctan | 2023-03-14 | 4 | -1/+110 |
| * | [RV64_DYNAREC] Added 85 TEST opcode (#563) | Yang Liu | 2023-03-14 | 3 | -2/+63 |
| * | [RV64_DYNAREC] Added C1 /7 SAR opcode (#559) | xctan | 2023-03-14 | 4 | -4/+107 |
| * | [RV64_DYNAREC] Small optimization for 31 XOR opcode (#561) | Yang Liu | 2023-03-14 | 1 | -6/+11 |
| * | [RV64_DYNAREC] Added 31 XOR opcode (#560) | Yang Liu | 2023-03-14 | 4 | -18/+88 |
| * | [ARM64_DYNAREC] Small optim when putting 0 in a memory location | ptitSeb | 2023-03-13 | 1 | -6/+14 |
| * | [ARM64_DYNAREC] Use STUR/LDUR when possible, plus some other small improvments | ptitSeb | 2023-03-13 | 22 | -463/+590 |
| * | [ARM64_DYNAREC] Optimised double push/pop with stp/ldp opcode | ptitSeb | 2023-03-13 | 3 | -11/+70 |
| * | [ARM64_DYNAREC] Removed child leftover, it's not implemented anymore | ptitSeb | 2023-03-13 | 4 | -26/+0 |
| * | [RV64_DYNAREC] Removed child leftover, it's not implemented anymore | ptitSeb | 2023-03-13 | 4 | -19/+0 |
| * | [RV64_DYNAREC] Some small optim to geted | ptitSeb | 2023-03-13 | 1 | -11/+34 |
| * | [RV64_DYNAREC] Fixed scratch register conflict for SUB (#556) | Yang Liu | 2023-03-13 | 2 | -3/+3 |
| * | [RV64_DYNAREC] Added 1 more scratch register (it was already saved/restored) | ptitSeb | 2023-03-13 | 1 | -0/+1 |
| * | [RV64_DYNAREC] Fixed rv64_epilog_fast, but it's not used for now | ptitSeb | 2023-03-13 | 1 | -6/+13 |
| * | [RV64_DYNAREC] Added 8B MOV opcode (#555) | xctan | 2023-03-13 | 2 | -0/+15 |
| * | [DYNAREC] Fixed missing X_PEND need at end of block for unimplemented opcode | ptitSeb | 2023-03-13 | 1 | -1/+13 |
| * | [ARM64_DYNAREC] Added unimplemented handling of CRC32 opcode (to avoid stoppi... | ptitSeb | 2023-03-13 | 1 | -0/+36 |
| * | [RV64_DYNAREC] Added (81/83) SUB opcode (#554) | Yang Liu | 2023-03-13 | 3 | -42/+108 |
| * | [RV64_DYNAREC] Added 29 SUB opcode (#553) | Yang Liu | 2023-03-13 | 5 | -15/+168 |
| * | Tried to optimize TLS fetching | ptitSeb | 2023-03-12 | 4 | -18/+20 |
| * | Cleanup mutex wrapping | ptitSeb | 2023-03-12 | 4 | -70/+6 |
| * | [DYNAREC] Fix some potential issue in the next jump handling | ptitSeb | 2023-03-12 | 1 | -5/+7 |
| * | [ARM64_DYNAREC] Added 66 0F 3A 0A opcode | ptitSeb | 2023-03-12 | 1 | -1/+19 |
| * | [ARM64_DYNAREC] Added (F2/F3) A7 opcode | ptitSeb | 2023-03-12 | 1 | -1/+39 |
| * | Expose POPCNT capability too | ptitSeb | 2023-03-12 | 2 | -1/+2 |
| * | [ARM64_DYNAREC] Added 66 0F 3A 0E opcode | ptitSeb | 2023-03-12 | 1 | -0/+36 |
| * | [ARM64_DYNAREC] Added F4 opcode | ptitSeb | 2023-03-12 | 1 | -0/+11 |
| * | Added support for SSE4.1, and added a couple of opcode ([ARM64_DYNAREC] too) | ptitSeb | 2023-03-12 | 5 | -2/+47 |
| * | [ARM64_DYNAREC] Fixed build | ptitSeb | 2023-03-12 | 4 | -1/+32 |
| * | [DYNAREC] Some renaming for the sake of consistancy | ptitSeb | 2023-03-12 | 7 | -26/+12 |
| * | Rv64 dynarec (#550) | ptitSeb | 2023-03-12 | 33 | -54/+3624 |
| * | [DYNAREC] Small optim for 66 0F 6D opcode | ptitSeb | 2023-03-11 | 1 | -1/+3 |