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* [TRACE] Added C3..C0 to x87 traceptitSeb2024-04-281-0/+2
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* Added 3 more functions on wrapped sdl2 (for VVVVVV)ptitSeb2024-04-271-0/+3
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* Fixed my_prepare_thread in dynarec build (#1474)Yang Liu2024-04-271-2/+4
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* [LA64_DYNAREC] Added more opcodes (#1473)Yang Liu2024-04-272-0/+157
| | | | | | | | | | | | | | | * Added 66 0F PSHUFB opcode * Added 66 0F PHADDW opcode * Added 66 0F 38 02 PHADDD opcode * Added 66 0F 38 03 PHADDSW opcode * Added 66 0F 38 04 PMADDUBSW opcode * Added 66 0F 38 05..0A opcodes * Upgrade QEMU
* Changed how wine prereserve is handled on box64ptitSeb2024-04-272-7/+3
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* [DYNAREC] Fix some flag propagation with partial SF_SET/SF_SET_DFptitSeb2024-04-271-5/+1
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* [LA64_DYNAREC] Added more opcodes and fixes (#1472)Yang Liu2024-04-277-12/+269
| | | | | | | | | | | | | | | | | | | | | * Fixed SHUFPS again * Added 0F 28 MOVAPS opcode * Added 0F 2E/2F [U]COMISS opcodes * Added F3 0F 5A CVTSS2SD opcode * Added 66 0F 7E MOVD opcode * Added 66 0F 28 MOVAPD opcode * fastnan handling * Added F3 0F 5D MINSS opcode * Added F3 0F 5F MAXSS opcode * Added F3 0F C2 CMPSS opcode
* [ARM64_DYNAREC] Improved x87 stack handling on transformCache helper (helps ↵ptitSeb2024-04-271-26/+26
| | | | callret and bigblock on 32bits wow64 games)
* [LA64_DYNAREC] Added more useful extensions detection (#1469)Yang Liu2024-04-263-7/+29
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* [LA64_DYNAREC] Added more opcodes (#1468)Yang Liu2024-04-265-11/+174
| | | | | | | | | | | | | | | | | | | | | * Added 0F BF MOVSX opcode * Added F7 /5 IMUL opcode * Added 86 XCHG opcode * Added 66 0F PADDQ opcode * Added 0F C6 SHUFPS opcode * Added 66 0F 69 PUNPCKHWD opcode * Added 66 0F DB PAND opcode * Test * Review * Review
* [DYNAREC] Fixed an issue with flags when using SF_SET_NODF (fixed regression ↵ptitSeb2024-04-261-1/+1
| | | | with Freedom Planet 2 Wine/Wow64, probably a few other too)
* [DYNAREC] More fixes on BIGBLOCKptitSeb2024-04-261-1/+1
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* [ARM64_DYNAREC] Added 0F B1 opcodeptitSeb2024-04-261-0/+30
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* [DYNAREC] Stop building a block if opcode is garbbage or not redeable ↵ptitSeb2024-04-261-1/+8
| | | | (should help BIGBLOCK=2)
* [DYNAREC] Fixed emit_shift functions and more (#1466)Yang Liu2024-04-253-14/+38
| | | | | | | * [LA64_DYNAREC] Fixed emit_shift functions * [RV64_DYNAREC] Fixed emit_shift functions and more * Fixed la64 build
* [DYNAREC] Fix for some rare (or less rare depending on the backend) case of ↵ptitSeb2024-04-241-1/+1
| | | | jump incorectly computed (regression from previous commit)
* Changed x87 way of handling FFREE opcode ([DYNAREC] too, improving x87 ↵ptitSeb2024-04-2427-245/+428
| | | | robustness overall)
* Made minimum rdtsc frequency to 2GHz (seems 1GHz is not enough for Horizon ↵ptitSeb2024-04-231-1/+1
| | | | Zero Dawn)
* Autocalibrate RDTSC clock to 1GHz minimum, instead of 500MHz (helps ↵ptitSeb2024-04-221-1/+1
| | | | HorizonZeroDawn speed)
* [ARM64_DYNAREC] Small optim on flags handlingptitSeb2024-04-2210-70/+69
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* [ARM64_DYNAREC] Improved some specific cases of pcmpestri opcodeptitSeb2024-04-223-23/+152
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* [INTERPRETER] Improved SSE4.2 String opcodes, and improved test27ptitSeb2024-04-221-3/+9
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* [ANDOIRD] Fix buildptitSeb2024-04-221-2/+0
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* [TRACE] Fixed some dumpreg when x87stack is incoherentptitSeb2024-04-221-1/+3
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* [ANDROID] Try to fix test 07ptitSeb2024-04-221-0/+7
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* [ARM64_PRINTER] Added SHL printerptitSeb2024-04-221-0/+11
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* [ARM64_PRINTER] Fix some case of DecodeBit not working for 64bits valuesptitSeb2024-04-201-3/+5
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* Added 1 more sdl2 function (for #1458)ptitSeb2024-04-191-0/+1
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* Added 2 wrapped functions to sdl2ptitSeb2024-04-181-0/+2
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* Wrapped 1 more function for mpg123 (#1454)Yang Liu2024-04-171-0/+1
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* Added 66 68 opcode ([ARM64_DYNAREC] too)ptitSeb2024-04-172-0/+10
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* [DYNAREC] Fixed CF flag computation (#1453)Yang Liu2024-04-172-12/+22
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* [RV64_DYNAREC] Added more opcodes (#1451)ZoHan2024-04-171-0/+22
| | | | | * [RV64_DYNAREC] Added more opcodes * modify the format
* [LA64_DYNAREC] Added more opcodes (#1447)Yang Liu2024-04-149-4/+284
| | | | | | | | | | | | | | | | | | | | | * Added B4..B7 MOV opcode * Added 66 81,83 /5 SUB opcode * Added 30 XOR opcode * Added F0 01 LOCK ADD opcode * Added 66 81,83 /0 ADD opcode * Added 66 39 CMP opcode * Added 66 0F D6 MOVQ opcode * Added 0F 57 XORPS opcode * Fix * Added 66 0F 61 opcode
* [LA64_DYNAREC] Added 1 more opcode and some fixes too (#1444)Yang Liu2024-04-145-4/+89
| | | | | | | * Added D3 /0 ROL opcode * Refined emit_sub32c * Fixed BSF and BSR
* [DYNAREC] Fixed shift xw macros (#1443)Yang Liu2024-04-142-14/+47
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* Fixed a few warning here and there...ptitSeb2024-04-1311-249/+217
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* [LA64_DYNAREC] Added more opcodes (#1441)Yang Liu2024-04-125-0/+184
| | | | | | | | | | | | | | | * Added 66 C7 MOV opcode * Added B0..B3 MOV opcode * Added F0 87 LOCK XCHG opcode * Added 35 XOR opcode * Added F7 /7 IDIV opcode * Added BC BSF opcode * Added BD BSR opcode
* Revert some cpuid changes, they are more wrong then right it seemsptitSeb2024-04-121-2/+2
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* [RV64_DYNAREC] Fixed 66 C7 MOV opcode (#1440)Yang Liu2024-04-121-3/+2
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* [LA64_DYNAREC] Added more opcodes and fixed more issues (#1439)Yang Liu2024-04-124-6/+113
| | | | | | | | | | | | | | | | | * Added F3 0F 10 MOVSS opcodes * Added F3 0F 2A CVTSI2SS opcode * Added F3 0F 5E opcode * Added F3 0F 11 MOVSS opcode * Added 0C OR opcode * Added F3 0F 59 MULSS opcode * Added 81,83 /3 SBB opcode * Fixed 2 typos
* [LA64_DYNAREC] Made the CALLRET optimization complete (#1438)Yang Liu2024-04-123-0/+59
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* [RV64_DYNAREC] Implementation of some CRC32 instructions (#1435)kaixindeken2024-04-122-1/+58
| | | | | | | * [RV64_Dynarec] Implementation of some CRC32 instructions * Use BEXTI to detect the lowest bit * Prefer ANDI for lowest bit checking
* [LA64_DYNAREC] Small fix on emit_or32c LBT path (#1436)Yang Liu2024-04-111-1/+4
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* [LA64_DYNAREC] Added more opcodes to the printer (#1433)Yang Liu2024-04-103-429/+1963
| | | | | | | | | | | * Use ROTR * Added more opcodes to the printer * Added even more opcode to the printer * Fixed typos * More
* [LA64_DYNAREC] Refined MOV64 macros (#1430)Yang Liu2024-04-093-28/+48
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* Added 1 more function to icuucXX wrapped libs (for #1428)ptitSeb2024-04-085-0/+5
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* [DYNAREC] Enabled larger dynablockptitSeb2024-04-071-1/+1
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* [ARM64_DYNAREC] Small change to stay in sync with other backendptitSeb2024-04-071-2/+2
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* Fixed 0F A3 BT opcode (#1427)Yang Liu2024-04-072-1/+11
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