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* [ARM64_DYNAREC] Small optim to modreg CMPXCHG (#2680)Yang Liu2025-05-282-13/+15
* [WOW64] Supported logging to stdout (#2679)Yang Liu2025-05-288-70/+95
* [ARM64_DYNAREC] Fixed a warning (#2678)Yang Liu2025-05-281-1/+1
* [DYNAREC] Fixed expected return address in bridged native call (#2677)Yang Liu2025-05-282-2/+2
* [RV64_DYNAREC] Fixed regression introduced in #2669 (#2676)Yang Liu2025-05-274-28/+30
* [RV64_DYNAREC] Removed useless zero-ups in some emit_* functions (#2672)Yang Liu2025-05-262-20/+41
* [RV64_DYNAREC] Added more opcodes to printer (#2671)Yang Liu2025-05-261-0/+220
* [BOX32][WRAPPER] Added some time64 functions (for #2655)ptitSeb2025-05-268-6/+136
* [RV64_DYNAREC] Improved ret_to_epilog with xtheadmemidx (#2670)Yang Liu2025-05-262-61/+83
* [RV64_DYNAREC] Minor nativeflags optim to LEA and CMOVcc opcodes (#2669)Yang Liu2025-05-266-28/+118
* [WOW64] Implement my_cpuidAndré Zwing2025-05-254-523/+542
* [WOW64] Implement getBoxCpuNameAndré Zwing2025-05-251-1/+2
* [WOW64] Implement get_random32 and get_random64André Zwing2025-05-251-5/+9
* [RV64_DYNAREC] Improved emit_pf with Zbb (#2665)Yang Liu2025-05-231-7/+11
* [RV64_DYNAREC] Optimized CLZ macro with xtheadbb (#2664)Yang Liu2025-05-232-40/+48
* [RV64_DYNAREC] Optimized some opcodes with xtheadbb (#2663)Yang Liu2025-05-233-29/+47
* Added -k option to kill all box64 instances (#2661)Yang Liu2025-05-231-1/+65
* [WOW64] Implement syscallsAndré Zwing2025-05-222-0/+21
* [WOW64] Don't check the protection on win32André Zwing2025-05-221-0/+2
* [ARM64_DYNAREC] Try to avoid Load/Unload of XMM/YMM regs when possible on int...ptitSeb2025-05-226-26/+121
* [RV64_DYNAREC] Enable nativeflags optimization for more patterns (#2659)Yang Liu2025-05-2216-176/+201
* [BOX32][WRAPPER][TRACE] Fixed some DLSYM_ERROR tracesptitSeb2025-05-221-5/+5
* [WRAPPER][TRACE] Fixed some DLSYM_ERROR tracesptitSeb2025-05-222-13/+13
* [INTERP] Added unaligned path for F0 FF /1 32bits opcodeptitSeb2025-05-211-3/+14
* [ARM64_DYNAREC] Fix (and small optim) on VPMASKMOVD/VPMASKMOVQ opcodesptitSeb2025-05-211-8/+8
* [RV64_DYNAREC] Fixed a typo in 66 F0 0F LOCK CMPXCHG opcode (#2658)Yang Liu2025-05-211-1/+1
* Reprint env configs when special libraries detected (#2657)Yang Liu2025-05-212-3/+8
* [RV64_DYNAREC] Implemented unaligned path for LOCK INC/DEC opcodes (#2656)Yang Liu2025-05-211-8/+34
* Better mmap file tracking when loading multiple file with same name (like 32b...ptitSeb2025-05-211-4/+7
* {BOX32][WRAPPER] More fixes on libdbus-1 wrappingptitSeb2025-05-201-5/+9
* [DYNAREC] Removed unnecessary volatile metadata barriers (#2653)Yang Liu2025-05-201-12/+4
* [RV64_DYNAREC] Fixed more potential scratch register conflicts (#2652)Yang Liu2025-05-202-5/+5
* [BOX32][WRAPPER] Try to fix some of the issues with wrapped libdbus-1 and arr...ptitSeb2025-05-204-9/+79
* [INTERP] Small change on 0F 2E/2F opcode, and alows Interp->Dynarec on 80..8F...ptitSeb2025-05-201-2/+2
* [INTERP] Fixed D9 F5/F8 (for #2644)ptitSeb2025-05-201-40/+14
* [RV64_DYNAREC] Improved POPCNT and fixed some scratch conflicts (#2651)Yang Liu2025-05-206-34/+95
* [RV64] Improved vendor extension detection to avoid conflicts (for #2645)Yang Liu2025-05-201-37/+51
* [WOW64] Implement BTCpuSimulateAndré Zwing2025-05-193-0/+9
* [BOX32][WRAPPER] Fixed issue with wrapping of libdbus-1ptitSeb2025-05-191-5/+8
* [TRACE] Slight better trace when running with custommem memory trackerptitSeb2025-05-191-3/+9
* [BOX32][WRAPPER] This should fix RV64 and LA64 buildsptitSeb2025-05-191-2/+2
* [BOX32][WRAPPER] Added 32bits wrapping for libdbus-1ptitSeb2025-05-1911-2/+1272
* [ARM64_DYNAREC] Added fastnan=0 handling to 0F 52 opcodeptitSeb2025-05-182-15/+13
* [RV64_DYNAREC] Enabled native flags optimization for SETcc opcodes (#2640)Yang Liu2025-05-164-30/+87
* [TRACE] Reduce the noise when using SHOWSEGV=1 on Winde programsptitSeb2025-05-152-2/+2
* [RV64_DYNAREC] Added F2 0F F0 LDDQU opcode for vector (#2639)Yang Liu2025-05-151-0/+18
* [DYNAREC] Fixed alternate address testing when retriving dynablock (#2638)Yang Liu2025-05-152-4/+3
* [RV64_DYNAREC] Added more opcodes for vector (#2637)Yang Liu2025-05-152-1/+30
* [DYNAREC] More minor changes to missing VEX prefixed opcodes (#2636)Yang Liu2025-05-152-2/+3
* [ARM64_DYNAREC][TRACE] Yet another small change on DYNAREC_MISSING=1 handling...ptitSeb2025-05-151-1/+1