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* Introduced a bitmap based allocator for <= 128bits customMalloc (not lockfree...ptitSeb2025-03-301-38/+167
* [RV64] Improved rv64_lock_cas[b/h] helpersptitSeb2025-03-301-2/+2
* [LA64] Fixed la64_lock_cas_[h/b]_slow helper (rarely used)ptitSeb2025-03-301-2/+2
* [ARM64_DYNAREC] Fixed a potential issue with SSE regs when internal jumping t...ptitSeb2025-03-292-3/+24
* [BOX32] Small changes in pthread_cond_timedwait wrapping to handle malformed ...ptitSeb2025-03-291-2/+12
* [LA64_DYNAREC] Added more MMX opcodes (#2479)Yang Liu2025-03-281-70/+233
* [LA64_DYNAREC] Added more MMX opcodes (#2477)Yang Liu2025-03-284-0/+125
* [LA64_DYNAREC] Added preliminary MMX support (#2476)Yang Liu2025-03-286-45/+200
* [LA64_DYNAREC] Added more opcodes (#2475)Yang Liu2025-03-281-26/+76
* [LA64_DYNAREC] Added more opcodes (#2473)Yang Liu2025-03-271-0/+71
* [LA64_DYNAREC] Added more opcodes (#2472)Yang Liu2025-03-271-0/+30
* [INTERP] Fixed Interpreter to have new test30 running on RISC-V (#2470)Yang Liu2025-03-272-90/+123
* Some fixes to ncurses / tinfo wrapped lib (for dialog shell helper, used in s...ptitSeb2025-03-278-17/+24
* [INTERP] More NA Sign fixes for a few AVX.0F opcodesptitSeb2025-03-261-8/+8
* [INTERP] Fixed Interpreter to have new test30 runningptitSeb2025-03-263-4/+100
* [ARM64_DYNAREC] Added fastnan=0 path for HSUBPS opcodeptitSeb2025-03-261-0/+13
* [ARM64_DYNAREC] Improved VHSUBPS opcode, and added fastnan=0 pathptitSeb2025-03-261-13/+16
* [ARM64_DYNAREC] Commented a message that doesn't seems releventptitSeb2025-03-261-2/+2
* [COSIM] Changed how F0 LOCK opcodes are skipped in COSIMptitSeb2025-03-262-1/+6
* [ARM64_DYNAREC] Improved (V)HADDPS with fastnan=0ptitSeb2025-03-262-4/+39
* [ARM64_DYNAREC] Addedfastnan=0 code to (V)SQRTPS opcodesptitSeb2025-03-262-4/+30
* [ARM64_DYNAREC] Improved (V)MAXP[S/D] and (V)MINP[S/D] opcodes to more closel...ptitSeb2025-03-264-40/+47
* [ARM64_DYNAREC] Small change on AVX.66.0F38 BA opcode to more closely match x...ptitSeb2025-03-261-3/+11
* [RV64_DYNAREC] Fixed 66 0F 6A PUNPCKHDQ opcodes (#2468)Yang Liu2025-03-261-2/+2
* [RV64_DYNAREC] Minor improvement to DD /7 FNSTSW opcode (#2467)Yang Liu2025-03-251-0/+1
* [RV64_DYNAREC] Fixed D9 E5 FXAM opcode (#2466)Yang Liu2025-03-251-3/+3
* [RV64_DYNAREC] Small optim to vsetvli usage (#2465)Yang Liu2025-03-251-1/+3
* [RV64_DYNAREC] Fixed scratch conflicts with fastround=0 in some x87 opcodes (...Yang Liu2025-03-245-14/+11
* [RV64_DYNAREC] Fixed some DD prefixed x87 opcodes (#2463)Yang Liu2025-03-241-2/+10
* [DYNAREC] Better handling of blocksize limit when generating very large dynab...ptitSeb2025-03-244-14/+28
* [ARM64_DYNAREC] Better log for arch_populate buffer being undersizedptitSeb2025-03-221-3/+2
* [ARM64_DYNAREC] Fixed potential issue on unligned path being marked while dyn...ptitSeb2025-03-222-4/+4
* [ARM64_DYNAREC][TRACE] Added a message on Dump for Unaligned path on opcodesptitSeb2025-03-225-0/+7
* [ARM64_DYNAREC] Added 67 66 0F 76/EF opcodes (for #1046)ptitSeb2025-03-211-1/+36
* [WRAPPER] Reverted previus commitptitSeb2025-03-202-527/+0
* [WRAPPER] Forgot those file in previous commitptitSeb2025-03-202-0/+527
* [WRAPPER] Added wrapping for libavutil.so.56, libavformat.so.58 and libavcode...ptitSeb2025-03-2020-0/+1536
* [RCFILE] Fixed BOX64_EMULATED_LIBS that was broken when used inside an rcfileptitSeb2025-03-201-0/+3
* [WRAPPER] Added a couple of GL extensionsptitSeb2025-03-205-0/+21
* [RV64_DYNAREC] Fixed many minor issues (#2451)Yang Liu2025-03-196-60/+65
* [DYNAREC] Fixed minor issues for F0 0F B0/B1 LOCK CMPXCHG opcodes (#2448)Yang Liu2025-03-193-24/+20
* [BOX32] Small change on memory managment againptitSeb2025-03-182-36/+13
* [RV64_DYNAREC] Added 66 F0 0F B1 LOCK CMPXCHG opcode (#2447)Yang Liu2025-03-181-0/+53
* [RV64_DYNAREC] More minor changes and fixes to x87 opcodes (#2443)Yang Liu2025-03-175-91/+63
* This should fix non-Dynarec buildptitSeb2025-03-171-26/+26
* [BOX32] Small refactor on memory managmentptitSeb2025-03-173-30/+70
* [DYNAREC] Small change in strongmem to end a SEQ with a Brrier at last_write ...ptitSeb2025-03-171-2/+3
* [DYNAREC] Change in strongmem managment to end a SEQ on jump arrival and not ...ptitSeb2025-03-171-1/+1
* [BOX32] Change to get all created bricks to be conitgus on 32bits, as address...ptitSeb2025-03-171-2/+8
* [ARM64_DYNAREC] Small optim on special case of LOCK OR [RSP], 0ptitSeb2025-03-171-15/+19