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authorChristian Krinitsin <mail@krinitsin.com>2025-05-21 21:21:26 +0200
committerChristian Krinitsin <mail@krinitsin.com>2025-05-21 21:21:26 +0200
commit4b927bc37359dec23f67d3427fc982945f24f404 (patch)
tree245449ef9146942dc7fffd0235b48b7e70a00bf2 /gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml
parentaa8bd79cec7bf6790ddb01d156c2ef2201abbaab (diff)
downloademulator-bug-study-4b927bc37359dec23f67d3427fc982945f24f404.tar.gz
emulator-bug-study-4b927bc37359dec23f67d3427fc982945f24f404.zip
add gitlab issues in toml format
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+id = 2663
+title = "powerpc: for 6xx,7xx,74xx msr and srr1 are not set correctly on exception"
+state = "opened"
+created_at = "2024-11-08T13:43:03.119Z"
+closed_at = "n/a"
+labels = ["kind::Bug", "target: ppc", "workflow::Patch available"]
+url = "https://gitlab.com/qemu-project/qemu/-/issues/2663"
+host-os = "n/a"
+host-arch = "n/a"
+qemu-version = "n/a"
+guest-os = "n/a"
+guest-arch = "n/a"
+description = """When an exception is raised, qemu does not set bits in SRR1 and MSR correctly.
+
+This causes some operating systems to not work, in particular early little endian ones like Windows NT."""
+reproduce = "n/a"
+additional = """The following patch changes the MSR and SRR1 bit settings on exception to what is mentioned in the various user manuals for the 6xx, 7xx and 74xx series (6xx and 7xx are effectively identical, 74xx has some additional changes): [exception_msr.patch](/uploads/aae17dd35f0f0e72b831243fcfd0c416/exception_msr.patch)"""