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| author | Bernhard Beschow <shentey@gmail.com> | 2025-02-23 12:46:56 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-25 17:02:14 +0000 |
| commit | 487967bed65083db33561edc1255ced422bfbff5 (patch) | |
| tree | 50770d154807e9b3e576491ef94b665dde98c03f /docs/system/arm | |
| parent | 86c2dff9552ad5a9b2febf329a2dbd2620bc2145 (diff) | |
| download | focaccia-qemu-487967bed65083db33561edc1255ced422bfbff5.tar.gz focaccia-qemu-487967bed65083db33561edc1255ced422bfbff5.zip | |
hw/arm/fsl-imx8mp: Add SNVS
SNVS contains an RTC which allows Linux to deal correctly with time. This is particularly useful when handling persistent storage which will be done in the next patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-7-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system/arm')
| -rw-r--r-- | docs/system/arm/imx8mp-evk.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst index f0df346113..22541c5442 100644 --- a/docs/system/arm/imx8mp-evk.rst +++ b/docs/system/arm/imx8mp-evk.rst @@ -12,6 +12,7 @@ The ``imx8mp-evk`` machine implements the following devices: * Up to 4 Cortex-A53 cores * Generic Interrupt Controller (GICv3) * 4 UARTs + * Secure Non-Volatile Storage (SNVS) including an RTC * Clock Tree Boot options |