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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-09-29 15:40:33 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-10-07 03:37:04 +0200 |
| commit | c2cac27dba3db3348563154f9b4b436ecde7b09a (patch) | |
| tree | 1dd6bb9ca1601fd5b06e117094da089ad631b6c9 /hw/core | |
| parent | ec1eb357cb86eee74d63940154db1e1bfa86026a (diff) | |
| download | focaccia-qemu-c2cac27dba3db3348563154f9b4b436ecde7b09a.tar.gz focaccia-qemu-c2cac27dba3db3348563154f9b4b436ecde7b09a.zip | |
system/physmem: Pass address space argument to cpu_flush_icache_range()
Rename cpu_flush_icache_range() as address_space_flush_icache_range(), passing an address space by argument. The single caller, rom_reset(), already operates on an address space. Use it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-7-philmd@linaro.org>
Diffstat (limited to 'hw/core')
| -rw-r--r-- | hw/core/loader.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/core/loader.c b/hw/core/loader.c index 524af6f14a..477661a025 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1242,7 +1242,7 @@ static void rom_reset(void *unused) * that the instruction cache for that new region is clear, so that the * CPU definitely fetches its instructions from the just written data. */ - cpu_flush_icache_range(rom->addr, rom->datasize); + address_space_flush_icache_range(rom->as, rom->addr, rom->datasize); trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->isrom); } |