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authorPeter Maydell <peter.maydell@linaro.org>2024-03-07 12:19:02 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-03-07 12:19:02 +0000
commita681d66e95f0eb5de014fbbc8f1d6286e0750bb5 (patch)
tree8504da82793f6c9b4b2019bd98f0aab6fd706dae /hw/gpio/stm32l4x5_gpio.c
parentc6b0ecb236ba6f8c29cf00c93494901aa22e4dae (diff)
downloadfocaccia-qemu-a681d66e95f0eb5de014fbbc8f1d6286e0750bb5.tar.gz
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target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written
Don't allow the guest to write CNTHCTL_EL2 bits which don't exist.
This is not strictly architecturally required, but it is how we've
tended to implement registers more recently.

In particular, bits [19:18] are only present with FEAT_RME,
and bits [17:12] will only be present with FEAT_ECV.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240301183219.2424889-5-peter.maydell@linaro.org
Diffstat (limited to 'hw/gpio/stm32l4x5_gpio.c')
0 files changed, 0 insertions, 0 deletions