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authorMax Filippov <jcmvbkbc@gmail.com>2020-03-14 11:13:53 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2020-08-21 12:48:15 -0700
commitf8c613701637ebfbf75570153715af3ac7aeca9d (patch)
tree2daf1e3b5bd4aa9c65a12b58eb98cdc1b575e3ab /hw/i2c/omap_i2c.c
parentcfa9f0518144c0ea30f51fd2f203a09dd0a40cd9 (diff)
downloadfocaccia-qemu-f8c613701637ebfbf75570153715af3ac7aeca9d.tar.gz
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target/xtensa: implement FPU division and square root
This does not implement all opcodes related to div/sqrt as specified in
the xtensa ISA, partly because the official specification is not
complete and partly because precise implementation is unnecessarily
complex. Instead instructions specific to the div/sqrt sequences are
implemented differently, most of them as nops, but the results of
div/sqrt sequences is preserved.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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