summary refs log tree commit diff stats
path: root/hw/intc/apic.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2023-01-30 18:24:43 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-02-03 12:59:22 +0000
commit034bb45ac14602c757c1e9da32196ffa94459c79 (patch)
tree835dcc3daae445db390af587b01d44fd9248b600 /hw/intc/apic.c
parent049edada5e93df096c66a059e1171942238fc472 (diff)
downloadfocaccia-qemu-034bb45ac14602c757c1e9da32196ffa94459c79.tar.gz
focaccia-qemu-034bb45ac14602c757c1e9da32196ffa94459c79.zip
target/arm: Disable HSTR_EL2 traps if EL2 is not enabled
The HSTR_EL2 register is not supposed to have an effect unless EL2 is
enabled in the current security state.  We weren't checking for this,
which meant that if the guest set up the HSTR_EL2 register we would
incorrectly trap even for accesses from Secure EL0 and EL1.

Add the missing checks. (Other places where we look at HSTR_EL2
for the not-in-v8A bits TTEE and TJDBX are already checking that
we are in NS EL0 or EL1, so there we alredy know EL2 is enabled.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id: 20230130182459.3309057-8-peter.maydell@linaro.org
Message-id: 20230127175507.2895013-8-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/apic.c')
0 files changed, 0 insertions, 0 deletions